參數(shù)資料
型號: PCM1740
英文描述: CONN,CPRSN,2-WAY
中文描述: 立體聲音頻數(shù)模轉換器與石英振蕩器和PLL
文件頁數(shù): 10/20頁
文件大小: 359K
代理商: PCM1740
10
PCM1740
LRCK
BCK
DATA
SCKO
Frame Sync
Serial Bit Clock
Serial Data Output
Audio Clock
PCM1740
Audio DSP/Decoder
14
15
16
1
2
3
14
15
1/fs
L_ch
R_ch
MSB
LSB
16
LRCIN (pin 4)
(a) Standard Right - Justified Format
(b) I
2
S Format
BCKIN (pin 6)
AUDIO DATA WORD = 16-BIT
DIN (pin 5)
1
2
3
14
15
MSB
LSB
16
18
19
20
1
2
3
18
19
MSB
LSB
20
AUDIO DATA WORD = 20-BIT
DIN (pin 5)
1
2
3
18
19
MSB
LSB
20
23
24
1
2
3
22
23
MSB
LSB
24
AUDIO DATA WORD = 24-BIT
DIN (pin 5)
1
2
3
22
23
MSB
LSB
24
1
2
3
14
15
1/fs
L_ch
R_ch
MSB
LSB
16
LRCIN (pin 4)
BCKIN (pin 6)
AUDIO DATA WORD = 16-BIT
DIN (pin 5)
1
2
3
14
15
MSB
LSB
16
1
2
3
18
19
MSB
LSB
20
AUDIO DATA WORD = 20-BIT
DIN (pin 5)
1
2
3
18
19
MSB
LSB
20
2
1
2
1
2
1
1
2
3
22
23
MSB
LSB
24
AUDIO DATA WORD = 24-BIT
DIN (pin 5)
1
2
3
22
23
MSB
LSB
24
The LRCK input is operated at the sampling frequency, f
S
.
The BCK input is operated at 32, 48, or 64 times the
sampling frequency. Both LRCK and BCK must be syn-
chronous with the SCKO output for proper operation.
Data Formats
The PCM1740 supports two audio interface formats: Stan-
dard and I
2
S. These formats are shown in Figure 9. The
audio data word length for the Left and Right channels may
be 16-, 20-, or 24-bits. The audio data word length and
format are programmed using Control Registers 2 and 3. The
reset default condition is Standard format with 16-bit audio
data.
Timing Requirements
Figure 10 shows the audio interface timing requirements.
ZERO FLAG OUTPUT
The PCM1740 includes a zero flag output, ZERO (pin 16).
This is an open-drain output, and a 10k
pull-up resistor
connected to V
DD
is recommended when using the ZERO
flag as a logic output.
The PCM1740 includes an infinite zero detection function
that monitors the audio data at the DATA input (pin 18). If
the audio data for both the left and right channels is all zeros
for 65,536 continuous BCK clock cycles, the zero flag will
be activated, turning on a MOSFET switch and connecting
the ZERO pin to ground. This provides an active low output
that may be used to control an external mute circuit, or as a
logic indicator for an audio DSP/decoder or microprocessor.
AUDIO SERIAL INTERFACE
The PCM1740 includes a three-wire serial audio interface.
This includes LRCK (pin 19), BCK (pin 17), and DATA
(pin 18). The LRCK input is the audio left/right clock, which
is used as a latch signal for the interface. The BCK input is
used to clock audio data into the serial port. The DATA
input carries multiplexed data for the left and right audio
channels. Audio data must be Two’s Complement, MSB
first formatted. Figure 8 shows the typical connection be-
tween the PCM1740 audio serial interface and an audio DSP
or decoder.
LRCK and BCK Rates
FIGURE 8. Interfacing the PCM1740 to an Audio DSP.
FIGURE 9. Audio Interface Formats.
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