參數(shù)資料
型號： PCF26100ET
廠商： NXP SEMICONDUCTORS
元件分類： 通信及網(wǎng)絡(luò)
英文描述： DVI_D - DVI_D SINGLE LINK CABLE 5M BLK RoHS Compliant: Yes
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA48
封裝： 5 X 5 X 0.80 MM, PLASTIC, TFBGA-48
文件頁數(shù)： 6/28頁
文件大?。?/td> 121K
代理商： PCF26100ET
2
6
P
P
B
P
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5.2
Pin description
Table 1
Pin description for the TFABGA48 package
SYMBOL
BALL
DESCRIPTION
I/O
SIGNAL TYPE
SOURCE
POR
SHIFTCTRL
VIO_POWER
V
DD
LPO_CLK
PX_ON
V
SS(I/O)
SYS_CLK_REQ
SYS_CLK
A1
C2
B1
C1
D1
E1
E2
F1
G1
reset output to baseband controller
test mode
power-on reset reference
core supply voltage
3.2 kHz low-power clock to baseband controller
receive packet synchronization correlation achieved
I/O ground supply
system clock control input from baseband controller
controlled system clock output to baseband
controller
transmit data clock output to baseband controller
core ground supply
receive data output to baseband controller
test mode
oscillator ground supply
oscillator output
oscillator input
oscillator supply voltage
I/O supply voltage
reset and POR on control input
test mode
DC offset control to UAA3558
I/O ground supply
serial interface and timing control output to UAA3558
serial interface clock output to UAA3558
serial interface data output to UAA3558
reference clock output to UAA3558
analog ground supply
RSSI analog input from UAA3558
analog transmit data output to UAA3558
O
I
I
P
O
I
P
I
O
1
×
CMOS output
non-inverting CMOS input with pull-down
Schmitt-trigger input
core power
1
×
CMOS output
non-inverting CMOS input
I/O ground
non-inverting CMOS input
3
×
CMOS output
BB
test
BB
BB
BB
BB
TX_CLK
V
SS
RX_DATA
ANATEST
V
SS(osc)
XOUT
XIN
V
DD(osc)
V
DD(I/O)
POR_EXT
TEST_EN
SLCCTR
V
SS(I/O)
S_EN
S_CLK
S_DATA
REF_CLK
V
SSA
RSSI
T_GFSK
F2
G2
H1
G3
H2
H3
H4
H5
G5
H6
H7
G6
G7
H8
F7
G8
F8
O
P
O
I
P
O
I
P
P
I
I
O
P
O
O
O
O
P
I
O
1
×
CMOS output
core ground
1
×
CMOS output
non-inverting CMOS input with pull-down
oscillator ground
oscillator output
oscillator input
oscillator power
I/O power
non-inverting CMOS input
non-inverting CMOS input with pull-down
1
×
CMOS output
I/O ground
1
×
CMOS output
1
×
CMOS output
1
×
CMOS output
3
×
CMOS output
analog ground
analog input
analog output
BB
BB
test
misc
misc
host
test
UAA
UAA
UAA
UAA
E8, D8
D7
C8
UAA
UAA
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