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參數(shù)資料
| 型號： | PCF26100ET |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | DVI_D - DVI_D SINGLE LINK CABLE 5M BLK RoHS Compliant: Yes |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA48 |
| 封裝： | 5 X 5 X 0.80 MM, PLASTIC, TFBGA-48 |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 121K |
| 代理商： | PCF26100ET |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
2001 Jun 19
16
Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
PCF26100
Table 21
Register values range and actual timings
6.5.5
RSSI
The RSSI is read via the serial interface. The UAA3558 provides an analog RSSI output. The interface logic converts the
analog RSSI value and stores the result in a serial interface register. The timing for converting the RSSI is programmed
using the RSSI_start register. The RSSI can only be measured starting 10
μ
s after the S_EN falling edge. The RSSI
value can only be read from the serial interface register after the measurement has been completed, this is at the end of
the packet. RSSI measurements are only done in receive packets.
Table 22
RSSI control word
6.5.6
T
RANSMIT POWER CONTROL
The transmit power can be controlled from a serial interface register. The 8-bit transmit power control word is used to
control the PA DAC. Writing to the PA DAC register will directly change the PA DAC output. The PA control register
should be written when the transmitter is not active.
Table 23
Unidirectional JTAG PA control word
6.5.7
GFSK
TABLE
The values for the GFSK filter are stored in a 13-byte GFSK table. The GFSK table is accessed through a single control
word which is used to store the data in the GFSK table on subsequent writes. To align the writing to the GFSK table a
table address reset bit is available in the Enable register. When the reset bit ‘grst’ in the Enable register is set to a logic 1
the GFSK table address will be reset and the next GFSK control word is written at location 0 in the GFSK table. Every
subsequent write to the GFSK control word will be stored at the next address in the GFSK table. If the last address is
reached, subsequent writes will continue to effect the last address.
The values for the GFSK table depend on the reference voltage on V
DDA
. The T_GFSK signal should have a DC_Bias
of 1.2 V with a peak-to-peak swing of 1 V (amplitude = 0.5 V). For this the values for the GFSK table are calculated as
shown in Table 26.
Table 24
Unidirectional JTAG GFSK control word
REGISTER
RANGE
TIMING
ACTUAL VALUE
UNIT
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
S_EN_START
S_EN_WIDTH
T_SW_START
SLCCTR_START
S_EN_PULSE_DEL
RSSI_START
GFSK_DC_BIAS
0 < x < 256
0 < x < 256
S_EN_START < x < 256
0 < x < 256
0 < x < 256
0 < x < 256
0 < x < 256
t
2
and t
5
t
6
t
17
t
13
t
7
and t
8
t
4
t
10
S_EN_START + (0 to 1)
S_EN_WIDTH
T_SW_START + (0 to 1)
SLCCTR_START + 1
S_EN_PULSE_DEL + (0 to 1)
RSSI_START
GFSK_DC_BIAS + (0 to 1)
ADDRESS
7
6
5
4
3
2
1
0
18 (decimal)
RSSI
ADDRESS
7
6
5
4
3
2
1
0
24 (decimal)
PA power control
GFSK_TABLE
7
6
5
4
3
2
1
0
28 (decimal)
GFSK table value
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