參數(shù)資料
型號(hào)： PCF26100ET
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： DVI_D - DVI_D SINGLE LINK CABLE 5M BLK RoHS Compliant: Yes
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA48
封裝： 5 X 5 X 0.80 MM, PLASTIC, TFBGA-48
文件頁(yè)數(shù)： 12/28頁(yè)
文件大?。?/td> 121K
代理商： PCF26100ET
2001 Jun 19
12
Philips Semiconductors
Preliminary specification
Bluetooth Adapter IC
PCF26100
6.4
Serial interface
6.4.1
3-
WIRE
S-
BUS
The 3-wire S-bus at the radio side is a 32-bit serial interface which is used for control, TX/RX and channel information.
The 32-bit definition is given in Tables 4 and 5.
Bits 31 to 9 are static values and will not change dynamically, the value for these bits come from the static registers. Only
the trx and maindivider fields will control the UAA3558 on a slot-by-slot basis. The trx and main divider information comes
from the baseband controller serial interface channel word; see Section 6.5.1. However, the baseband controller channel
information needs a conversion to get the correct main divider information for the UAA3558.
Table 4
UAA3558 3-wire programming word
Table 5
UAA3558 3-wire programming word (continued)
6.4.2
JTAG
The JTAG serial interface is used to control the PCF26100 and subsequently the radio. The PCF26100 must be the only
slave on the JTAG bus as the PCF26100 does not allow for multi-slave operation. The JTAG interface protocol used is
fully compliant with the standard set out in “IEEE Std 1149.1-1990” The following features are supported:
5-bit register address
8-bit data
Set instruction register
Read/write data register (note: some addresses have a separate read and write data register).
The JTAG interface allows for 2 ways of accessing a register. One is the communicate address and data, and the second
one is for successive accesses to the same registers where only the data is communicated. This can, for example, be
used for updating the channel information before every packet.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
test
dpo
BW adjust
strc
sdsn
sdco
ssqs
ssth
dmo
tin
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
tsw
tamp
ref1
ref0
txp1
txp0
pll
trx
main divider (n)
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