參數(shù)資料
型號: PCD5008H
廠商: NXP SEMICONDUCTORS
元件分類: 尋呼電路
英文描述: FLEX Pager Decoder
中文描述: TELECOM, PAGING DECODER, PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32
文件頁數(shù): 48/64頁
文件大小: 341K
代理商: PCD5008H
1998 Jun 17
48
Philips Semiconductors
Product specification
FLEX
Pager Decoder
PCD5008
8.8.2
M
ESSAGE BUILDING
The PCD5008 sends data from the FLEX
signal to the
host in packets. Data is transmitted one block at a time,
and one phase at a time. For a 2 phase transmission,
information in block 0 phase-A is converted into packets
and sent to the host, then information in block 0 phase-C
is sent to the host followed by information in
block 1 phase-A and then information in block 1 phase-C
etc. Codewords for different calls may therefore be
interleaved, so the host must use the phase and word
number embedded in each packet to associate that packet
with a particular call.
The phase and word number of the vector packet provides
a unique key which allows the host to associate all the data
for a particular call within a frame. The host must then use
information embedded in the vector word to calculate what
message word locations are associated with the vector.
Tables 54 and 55 show an example of receiving three
messages (possibly portions of fragmented or group
messages), and two BIW packets in the first two blocks of
a 2 phase 3200 bps FLEX
frame in case of an
any-phase pager. Table 54 shows the block number, word
number and word content of both phase-A and phase-C
(subscripts indicate the call number). In a 6400 bps
FLEX
frame, there would be four phases: A, B, C and D;
in a 1600 bps signal there would be only phase-A.
Table 55 shows the sequence of packets transmitted to
the host.
Table 54
FLEX
transmission sequence
Notes
1.
2.
3.
Phases begin with BIW1, which is not sent to the host.
Codewords not addressed to the pager.
Vector for long address indicates the location of the
second and third message words.
For long addresses, the first message word
immediately follows the vector.
4.
BLOCK
WORD
PHASE-A
PHASE-C
0
0
1
2
3
4
5
6
7
8
9
10
11
BIW1; note 1
addr; note 2
addr; note 2
addr
1
addr
2
vect; note 2
vect; note 2
vect
1
vect
2
mess
1
(cw 1)
mess
1
(cw 2)
mess
1
(cw 3)
BIW1; note 1
BIW
BIW
addr; note 2
addr; note 2
long addr
3
(cw 1)
long addr
3
(cw 2)
addr; note 2
vect; note 2
vect; note 2
vect
3
; note 3
mess
3
(cw 1);
note 4
mess; note 2
mess; note 2
mess
3
(cw 2)
mess
3
(cw 3)
1
12
13
14
15
mess
2
(cw 1)
mess
2
(cw 2)
mess
2
(cw 3)
mess
2
(cw 4)
Table 55
PCD5008 packet sequence
Notes
1.
Word number in an address is that of the
corresponding vector.
BIW sent if BIW reception enabled by SBI bit in the
control packet.
2.
PACKET PHASE
PACKET
TYPE
WORD
NO.
COMMENT
1
2
3
A
A
A
address
address
vector
7
8
7
note 1
note 1
pointer to
phase-A
word 9
note 2
note 2
note 1
4
5
6
C
C
C
BIW
BIW
long
address
vector
n.a.
n.a.
10
7
A
8
pointer to
phase-A
word 12
mess
1
(cw 1)
mess
1
(cw 2)
mess
1
(cw 3)
mess
2
(cw 1)
mess
2
(cw 2)
mess
2
(cw 3)
mess
2
(cw 4)
pointer to
phase-A
word 14
mess
3
(cw 1)
mess
3
(cw 2)
mess
3
(cw 3)
8
9
10
11
12
13
14
15
A
A
A
A
A
A
A
C
message
message
message
message
message
message
message
vector
9
10
11
12
13
14
15
10
16
17
18
C
C
C
message
message
message
11
14
15
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