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參數(shù)資料
| 型號： | PC87782 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大小： | 114K |
| 代理商： | PC87782 |
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Table 1 PC87782 Signals (100-Pin Package)
Signal Name
Type
Function
32KCLKIN
32KX2
AMP0
AMP1
CLK
COL
CRS
DAOUT
ENV0-1
FAN1
FAN2
FAN3
HA
HCSA
HCSB
HD0-7
Input
Oscillator
Analog In
Analog In
Output
Input
Input
Analog Out
Input
Input
Input
Input
Input
Input
Input
I/O
32.768 KHz Oscillator Clock Input
32.768 KHz Crystal Oscillator Interface
Negative Voltage to Port I0 A/D op-amp
Negative Voltage to Port I1 A/D op-amp
CPU Clock Output
MII Interface: Collision Detect
MII Interface: Carrier Sense
D/A Converter Output
Environment select strap inputs
Fan Speed Timer Input 1
Fan Speed Timer Input 2
Fan Speed Timer Input 3
Host Address line: Distinguishes Commands from Data bytes.
Chip Select for Host Interface A
Chip Select for Host Interface B
Bidirectional Data bus used to interface the PC87782 to the peripheral data bus
of a host.
For factory test purposes only. Must be pulled permanently high in end
applications.
Host I/O Read. Active-low input to signal data read by the host processor.
Host I/O Write signal which enables a write operation to the PC87782 through
HD0-7.
Host Master Reset. Indicates state of Host system.
Host Power On Indication.
LAN Receiver Buffer Management: IN pointer
Interrupt A. Signals an interrupt on host channel A.
Interrupt B. Signals an interrupt on host channel B.
LAN Receiver: Buffer Overflow
Isolates MII from standard LAN MAC when low.
NAND Test Enable / ISE TRI-STATE Control
NAND Test Output
LAN Receiver Buffer Management: OUT pointer
Port B, bits 0 through 7
Port C, bits 0 through 7
Port F, bits 0 through 7
Power Fail (Non-Maskable Interrupt) Input
Port I A/D converter Analog Inputs. PI0 and PI1 can be configured as analog
feedback outputs for inputs AMP0 and AMP1, respectively.
General-purpose Wake-Up inputs for RING, CHASSIS, SWIN, BTI and other
events.
Master Reset to PC87782 device
MII Interface: Received Data nibble
MII Interface: Receiver Clock
MII Interface: Receiver Data Valid
MII Interface: Received Error
EXHFCLK
Input
HIOR
HIOW
Input
Input
HMR
HPWRON
IN0-1
IRQA
IRQB
LOSTPKT
MAC_ISOL
NANDEN
NTEST
OUT0-1
PB0-7
PC0-7
PF0-7
PFAIL
PI0-7
Input
Input
Output
Output
Output
Output
Output
Input
Output
Output
I/O
I/O
I/O
Input
Analog I/O
PL0-7
!/O
RESET
RXD0-3
RX_CLK
RX_DV
RX_ER
Input
Input
Input
Input
Input
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