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參數(shù)資料
| 型號： | PC87782 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大小： | 114K |
| 代理商： | PC87782 |
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Power Management
The Power Management Module (PMM) improves the effi-
ciency of the PC87782 device by changing the operating
mode (and therefore the power consumption) according to
the current level of activity. There are two power modes,
called Active and Idle. The Active mode is the normal operat-
ing mode. In the Idle mode, the device is inactive except for
the Power Management Module and Timing and Watchdog
Module, which continue to operate using the slow clock.
Host Interface
The Host Interface module is an interface to the host PC. It
consists of two channels. One channel is intended for Sys-
tem Environment Monitoring functions, similar to those pro-
vided by the LM78. The second channel is intended for
Power Management functions as defined for ACPI 1.0.
The PC87782 can generate Host Interface interrupt re-
quests: the SMI and SCI special interrupts, and two
maskable interrupts to manage transfers on the two host in-
terface channels. This allows the PC87782 to be used with
polling or interrupt driven schemes. The hardware is de-
signed to allow a race-free interface between the host and
PC87782.
SMB (ACCESS.bus) Interface
The System Management Bus (SMB) is a two-wire serial in-
terface compatible to the Intel SMB physical layer. It is also
compatible with ACCESS.bus and Phillips’ I
2
C. SMB may
serve as a bus master or a bus slave and perform both trans-
mit and receive operations.
LAN Interface
The Local Area Network (LAN) interface module provides the
ability to monitor Ethernet network traffic. It is designed for
the purpose of determining when to wake up a sleeping host
system. It can operate at 10 or 100 Mbps using the MII Stan-
dard Interface.
Fan-Speed Timer
The Fan-Speed Timer contains a single 8-bit timer with a dig-
ital input-glitch filter, designed to count the revolutions of a
cooling fan according to the tachometer pulses received from
the fan. The module has an input multiplexer, allowing up to
three different fans to be monitored.
NAND Test
The NAND Test circuit provides the ability to test the input
pins of the device. When the NANDEN input is pulled low, the
tested pins float and become inputs, and are logically NAND-
ED to an output pin, NTEST.
Real-Time Clock and Watchdog
The Timing and Watchdog Module (TWM) generates the
clocks and interrupts used for timing periodic functions in the
system. It also provides Watchdog protection against soft-
ware errors. The module operates on the slow (32.768 KHz)
clock.
The real-time clock generates a periodic interrupt to the CPU
at a software-programmed interval. This can be used for real-
time functions such as a time-of-day clock.
The Watchdog is designed to detect program execution er-
rors such as an infinite loop or a “runaway” program. Once
Watchdog operation is initiated, the application program
must periodically write a specific value to a Watchdog regis-
ter, within specific time intervals. If the software fails to do so,
a Watchdog error is triggered, which resets the device.
A/D and D/A Converters
The A/D Converter (ADC) module is an 8-channel multi-
plexed-input analog-to-digital converter. The A/D Converter
receives an analog voltage signal on an input pin and con-
verts the analog signal into an 8-bit digital value using suc-
cessive approximation. The CPU can then read the result
from a memory-mapped register. The module supports four
automated operating modes, providing single-channel or
scanned 4-channel operation in single or continuous mode.
Reading negative voltages is supported on two channels by
activating a set of on-chip op-amps.
The D/A Converter (DAC) module is a single-channel analog-
to-digital converter. The CPU writes a digital value to a regis-
ter and the D/A converter generates an analog voltage pro-
portional to the programmed value.
Reset and Configuration
The Reset and Configuration module controls the setting of
the environment and resets the device in response to power
up detection, WATCHDOG error, a rising edge on the host re-
set signal (HMR), a low level on the NANDEN pin, or a low
level on the RESET pin.
Operating Modes
The PC87782 is designed to operate in one of three modes:
Internal ROM Enabled (IRE), Internal ROM Disabled (IRD),
or Development. The 100-pin device can operate only in the
IRE mode, whereas the 160-pin device can operate in any of
the three modes. The IRD mode uses off-chip memory in-
stead of the on-chip ROM, which is useful for prototype work.
The Development mode is useful for Application Develop-
ment Boards and In-System Emulators.
External Interface
The PC87782 interfaces with the following external devices:
I
the Host processor, via the ISA interface and/or the SMB
(I
2
C) interface,
I
an Ethernet LAN Physical interface device, sharing the
MII interface with a standard MAC device
I
one or more LM75-series temperature monitors and/or
other serial devices, via the SMB interface
In a Development environment, the device also interfaces
with the ROM and RAM of the development system and the
development system peripherals.
Table 1 is a list of the PC87782’s signals in alphabetical or-
der, together with a brief description of each signal. Only the
pins in the 100-pin package are listed in this table. The 160-
pin device has additional pins to support its additional func-
tions.
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