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參數(shù)資料
| 型號： | PC87782 |
| 文件頁數(shù)： | 12/17頁 |
| 文件大小： | 114K |
| 代理商： | PC87782 |
12
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Memory Map
The CompactRISC architecture supports a uniform linear ad-
dress space of 256K bytes. The PC87782 implementation of
this architecture uses only the lowest 128K bytes of address
space, ranging from 00000 to 1FFFF hex. The remaining
128K bytes (20000 to 3FFFF hex) are not used by the device.
Table 7 is a memory map showing the types of memory and
peripherals that occupy this memory space. Address ranges
not listed in the table are reserved and should not be read or
written.
Table 7 PC87782 Memory Map
Table 8 is a detailed memory map showing the specific mem-
ory address of the memory, I/O ports, and registers. The ta-
ble shows the starting address, the size, and a brief
description of each memory block and register. For detailed
information on using these memory locations, see the appli-
cable sections in the data sheet.
All addresses not listed in the table are reserved and should
not be read or written. An attempt to access an unlisted ad-
dress will have unpredictable results.
Each byte-wide register occupies a single address and can
be accessed only in a byte-wide transaction. Each word-wide
register occupies two consecutive memory addresses and
can be accessed only in a word-wide transaction. Both the
byte-wide and word-wide registers reside at word boundaries
(even addresses). Thus, each byte-wide register uses only
the lowest eight bits of the internal data bus.
Most PC87782 registers are read/write registers. However,
some registers are read-only or write-only, as indicated in the
table. An attempt to read a write-only register or to write a
read-only register will have unpredictable results.
When the software writes to a register in which one or more
bits are reserved, it must write a zero to each reserved bit un-
less indicated otherwise in the description of the register.
Reading a reserved bit returns an undefined value.
SCL
SDA
OD-TTL
OD-TTL
1
1
ACCESS.bus Serial Clock signal
ACCESS.bus data signal
Table 6 Power Supply
Signal
Pin Number
No. of
Sig Pins
Function
100-pin
160-pin
AV
CC
V
CC
AGND
GND
V
CC
GND
1
4
1
4
2
8
Analog 5V power supply.
Digital 5V power supply.
Analog ground, for A/D and D/A.
Ground for on-chip logic and output drivers.
Digital 5V power supply.
Ground for on-chip logic and output drivers.
N/A
N/A
Table 5 Input/Output Pins
Signal
Type
Pin Number
No. of
Sig Pins
Function
100-pin
160-pin
Address (hex) Size
Description
BIU Zone
00000
07FFF 32K
08000
0DFFF 24K
0E000
0E1FF 512
Base Memory
Reserved
LAN Receive Buffer
RAM
Zone 0
N/A
0EA90
0F56F 2784 System RAM
0F800
0F87F 128
LAN Transmit Buffer
RAM
BIU Registers
I/O Expansion
On-chip module
registers
Off-Chip Memory
0F900
0F98F
0FB00
0FBFF 256
0FC00
0FFFF
10000
1FFFF 64K
Zone1
(IRD
mode
only)
Zones 2-3
20000
3FFFF 120K Reserved
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