參數(shù)資料
型號： P89CV51RD2FA,512
廠商： NXP Semiconductors
文件頁數(shù)： 36/76頁
文件大?。?/td> 0K
描述： IC 80C51 MCU FLASH 64K 44-PLCC
產(chǎn)品培訓模塊： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝： 26
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： EBI/EMI，SPI，UART/USART
外圍設備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
產(chǎn)品目錄頁面： 706 (CN2011-ZH PDF)
其它名稱： 568-4256-5
935283268512
P89CV51RD2FA
P89CV51RB2_RC2_RD2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 25 August 2009
41 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
address of all don’t cares. This effectively disables the automatic addressing mode and
allows the microcontroller to use standard UART drivers which do not make use of this
feature.
6.7 Serial Peripheral Interface (SPI)
6.7.1 SPI features
Master or slave operation
10 MHz bit frequency (max)
LSB rst or MSB rst data transfer
Four programmable bit rates
End of transmission (SPIF)
Write-collision ag protection (WCOL)
Wake-up from Idle mode (Slave mode only)
6.7.2 SPI description
The serial peripheral interface allows high-speed synchronous data transfer between the
P89CV51RB2/RC2/RD2 and peripheral devices or between several
P89CV51RB2/RC2/RD2 devices. Figure 16 shows the correspondence between master
and slave SPI devices. The SPICLK pin is the clock output and input for the Master and
Slave modes, respectively. The SPI clock generator will start following a write to the
master devices SPI data register. The written data is then shifted out of the MOSI pin of
the master device into the MOSI pin of the slave device. Following a complete
transmission of one byte of data, the SPI clock generator is stopped and the SPI interrupt
Flag (SPIF) is set. An SPI interrupt request will be generated if the SPI Interrupt Enable bit
(SPIE) and the SPI interrupt enable bit, ES, are both set.
An external master drives the Slave Select input pin (SS) LOW to select the SPI module
as a slave. If SS has not been driven LOW, then the slave SPI unit is not active and the
MOSI pin can also be used as an input port pin.
CPHA and CPOL control the phase and polarity of the SPI clock (SCK). Figure 17 and
Figure 18 show the four possible combinations of these two bits.
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相關代理商/技術參數(shù)
參數(shù)描述
P89CV51RD2FBC 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 64 kB flash microcontroller with 1 kB RAM, SPI, 6-clock CPU with 6/12-clock peripherals
P89CV51RD2FBC,557 功能描述:8位微控制器 -MCU 80C51 64K FL / 1K R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
P89LPC901 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
P89LPC901FD 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
P89LPC901FD,112 功能描述:8位微控制器 -MCU 80C51 1K FL 128B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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