參數(shù)資料
型號(hào)： P89CV51RB2FBC,557
廠商： NXP Semiconductors
文件頁數(shù)： 9/76頁
文件大小： 0K
描述： IC 80C51 MCU FLASH 16K 44-TQFP
產(chǎn)品培訓(xùn)模塊： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝： 800
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： EBI/EMI，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 16KB（16K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-TQFP
包裝： 托盤
其它名稱： 568-4253
935284179557
P89CV51RB2FBC
P89CV51RB2_RC2_RD2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 25 August 2009
17 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
Following a reset condition, under normal conditions, the MCU will start executing code
from address 0000H in the user’s code memory. However if either the PSEN pin was LOW
when reset was exited, or the status bit = 1, the MCU will start executing code from the
boot address. The boot address is formed using the value of the boot vector as the high
byte of the address and 00H as the low byte.
6.3 Flash memory
6.3.1 Flash organization
The P89CV51RB2/RC2/RD2 program memory consists of a 16/32/64 kB block for user
code. The ash can be read or written in bytes and can be erased in 128-B pages. A chip
erase function will erase the entire user code memory and its associated security bits.
There are three methods for erasing or programming the ash memory that may be used.
First, the ash may be programmed or erased in the end-user application by calling
LOW-state routines through a common IAP entry point. Second, the on-chip ISP
bootloader may be invoked. This ISP bootloader will, in turn, call LOW-state routines
through the same common entry point that can be used by the end-user application.
Third, the ash may be programmed or erased using the parallel method by using a
commercially available EPROM programmer which supports this device.
6.3.2 Features
Flash internal program memory with 128-B page erase.
Internal boot block, containing LOW-state IAP routines available to user code.
Boot vector allows user-provided ash loader code to reside anywhere in the ash
memory space, providing exibility to the user.
Default loader providing ISP via the serial port, located in upper-end of program
memory.
Programming and erase over the full operating voltage range.
Read/Programming/Erase using ISP/IAP.
Fig 6.
Power-on reset circuit
002aaa543
VDD
8.2 k
RST
XTAL2
XTAL1
C1
C2
10
F
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P89CV51RC2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 64 kB flash microcontroller with 1 kB RAM, SPI, 6-clock CPU with 6/12-clock peripherals
P89CV51RC2FA 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 64 kB flash microcontroller with 1 kB RAM, SPI, 6-clock CPU with 6/12-clock peripherals
P89CV51RC2FA,512 功能描述:8位微控制器 -MCU 80C51 32K FL / 512 R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89CV51RC2FA512 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述:
P89CV51RC2FBC 功能描述:8位微控制器 -MCU 80C51 32K FL / 512 R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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