參數(shù)資料
型號(hào)： ORLI10G-3BM416
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
英文描述： FPGA, 1296 CLBS, 380000 GATES, PBGA416
封裝： PLASTIC, BGA-416
文件頁(yè)數(shù)： 65/76頁(yè)
文件大?。?/td> 1222K
代理商： ORLI10G-3BM416
68
Lattice Semiconductor
Data Sheet
January 15, 2002
and ORLI12G Gbits/s Line Interface FPSC
ORCA ORLI10G Quad 2.5 Gbits/s, 10 Gbits/s
Package Thermal Characteristics
Summary
There are three thermal parameters that are in com-
mon use: ΘJA, ψJC, and ΘJC. It should be noted that all
the parameters are affected, to varying degrees, by
package design (including paddle size) and choice of
materials, the amount of copper in the test board or
system board, and system airflow.
Θ
ΘJA
This is the thermal resistance from junction to ambient
(theta-JA, R-theta, etc.):
Where TJ is the junction temperature, TA, is the ambi-
ent air temperature, and Q is the chip power.
Experimentally, ΘJA is determined when a special ther-
mal test die is assembled into the package of interest,
and the part is mounted on the thermal test board. The
diodes on the test chip are separately calibrated in an
oven. The package/board is placed either in a JEDEC
natural convection box or in the wind tunnel, the latter
for forced convection measurements. A controlled
amount of power (Q) is dissipated in the test chip’s
heater resistor, the chip’s temperature (TJ) is deter-
mined by the forward drop on the diodes, and the ambi-
ent temperature (TA) is noted. Note that ΘJA is
expressed in units of °C/W.
ψ
ψJC
This JEDEC designated parameter correlates the junc-
tion temperature to the case temperature. It is gener-
ally used to infer the junction temperature while the
device is operating in the system. It is not considered a
true thermal resistance, and it is defined by:
Where TC is the case temperature at top dead center,
TJ is the junction temperature, and Q is the chip power.
During the ΘJA measurements described above,
besides the other parameters measured, an additional
temperature reading, TC, is made with a thermocouple
attached at top-dead-center of the case. ψJC is also
expressed in units of °C/W.
Θ
ΘJC
This is the thermal resistance from junction to case. It
is most often used when attaching a heat sink to the
top of the package. It is defined by:
The parameters in this equation have been defined
above. However, the measurements are performed
with the case of the part pressed against a water-
cooled heat sink to draw most of the heat generated by
the chip out the top of the package. It is this difference
in the measurement process that differentiates ΘJC
from ψJC. ΘJC is a true thermal resistance and is
expressed in units of °C/W.
Θ
ΘJB
This is the thermal resistance from junction to board
(ΘJL). It is defined by:
Where TB is the temperature of the board adjacent to a
lead measured with a thermocouple. The other param-
eters on the right-hand side have been defined above.
This is considered a true thermal resistance, and the
measurement is made with a water-cooled heat sink
pressed against the board to draw most of the heat out
of the leads. Note that ΘJB is expressed in units of
°C/W, and that this parameter and the way it is mea-
sured are still in JEDEC committee.
FPSC Maximum Junction Temperature
Once the power dissipated by the FPSC has been
determined (see the Estimating Power Dissipation sec-
tion), the maximum junction temperature of the FPSC
can be found. This is needed to determine if speed der-
ating of the device from the 85 C junction temperature
used in all of the delay tables is needed. Using the
maximum ambient temperature, TAmax, and the power
dissipated by the device, Q (expressed in C), the max-
imum junction temperature is approximated by:
TJmax = TAmax + (Q o JA)
Figure 21 lists the thermal characteristics for all pack-
ages used with the ORCA ORLI10G FPSC.
ΘJA
TJ
TA
–
Q
--------------------
=
ψJC
TJ
TC
–
Q
--------------------
=
ΘJC
TJ
TC
–
Q
--------------------
=
ΘJB
TJ
TB
–
Q
--------------------
=
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