參數(shù)資料
型號(hào)： ORLI10G-2BM680
廠(chǎng)商： LATTICE SEMICONDUCTOR CORP
元件分類(lèi)： FPGA
英文描述： FPGA, 1296 CLBS, 380000 GATES, PBGA680
封裝： PLASTIC, BGA-680
文件頁(yè)數(shù)： 68/76頁(yè)
文件大小： 1222K
代理商： ORLI10G-2BM680
70
Lattice Semiconductor
Data Sheet
January 15, 2002
and ORLI12G Gbits/s Line Interface FPSC
ORCA ORLI10G Quad 2.5 Gbits/s, 10 Gbits/s
Package Parasitics
The electrical performance of an IC package, such as signal quality and noise sensitivity, is directly affected by the
package parasitics. Table 23 lists eight parasitics associated with the ORCA packages. These parasitics represent
the contributions of all components of a package, which include the bond wires, all internal package routing, and
the external leads.
Four inductances in nH are listed: LSW and LSL, the self-inductance of the lead; and LMW and LML, the mutual
inductance to the nearest neighbor lead. These parameters are important in determining ground bounce noise and
inductive crosstalk noise. Three capacitances in pF are listed: CM, the mutual capacitance of the lead to the near-
est neighbor lead; and C1 and C2, the total capacitance of the lead to all other leads (all other leads are assumed
to be grounded). These parameters are important in determining capacitive crosstalk and the capacitive loading
effect of the lead. Resistance values are in m.
The parasitic values in Table 23 are for the circuit model of bond wire and package lead parasitics. If the mutual
capacitance value is not used in the designer's model, then the value listed as mutual capacitance should be
added to each of the C1 and C2 capacitors.
Table 22. ORCA ORLI10G Package Parasitics
5-3862(C)r2
Figure 26. Package Parasitics
Package Type
LSW
LMW
RW
C1
C2
CM
LSL
LML
416-Pin PBGAM
3.52
0.80
235
0.40
1.0
0.25
1.5—5.0
0.5—1.30
680-Pin PBGAM
3.80
1.30
250
0.50
1.0
0.30
2.8—5.0
0.5—1.50
LSL
C2
C1
相關(guān)PDF資料
PDF描述
ORLI10G-3BM416 FPGA, 1296 CLBS, 380000 GATES, PBGA416
ORLI10G-3BM680 FPGA, 1296 CLBS, 380000 GATES, PBGA680
ORLI10G1BM680-DB FPGA, 1296 CLBS, 333000 GATES, PBGA680
ORLI10G2BM680-DB FPGA, 1296 CLBS, 333000 GATES, PBGA680
ORLI10G3BM680-DB FPGA, 1296 CLBS, 333000 GATES, PBGA680
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ORLI10G-2BM680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORLI10G-2BM680I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORLI10G-2BMN680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORLI10G-2BMN680I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORLI10G-3BM680C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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