參數(shù)資料
型號： OR3TP12-6BA256I
英文描述： Single 2.3V 10 MHZ OP, -40C to +125C, 14-SOIC 150mil, TUBE
中文描述： 用戶可編程ASIC的特殊功能
文件頁數(shù)： 98/128頁
文件大?。?/td> 2450K
代理商： OR3TP12-6BA256I
ORCAOR3TP12 FPSC
Embedded Master/Target PCI Interface
Data Sheet
March 2000
98
L Lucent Technologies Inc.
Timing Characteristics
(continued)
Table 39. OR3TP12 FPGA Side Interface Input Setup Delays, pciclk Synchronous Signals
OR3TP12 Commercial: V
DD
= 3.0 V to 3.6 V, 0 °C < T
A
< 70 °C.
Note: The input setup parameters are measured from the
pciclk
clock output pin on the FPGA side, excluding the interbufs, which traverse the
ASIC/FPGA boundary. The ORCAFoundry static analysis tool, trace, accounts for clock skew and interbuf delays on the clock and data
paths.
Table 40. OR3TP12 FPGA Side Interface Input Setup Delays, fclk Synchronous Signals
OR3TP12 Commercial: V
DD
= 3.0 V to 3.6 V, 0 °C < T
A
< 70 °C.
Note: The input setup parameters are measured from the
fclk1
and
fclk2
clock input pins on the FPGA side, excluding the interbufs, which
traverse the ASIC/FPGA boundary. The ORCA Foundry static analysis tool, trace, accounts for clock skew and interbuf delays on the
clock and data paths.
Description
(TI = 85 °C, V
DD
= min, V
DD
2 = min)
fpga_mbusyn
deltrn
mwpcihold
mr_mstopburstn
t_abort
t_retryn
twburstpendn
trpcihold
trburstpendn
fpga_syserror
cfgshiftenn
Min
Max
Unit
0
0
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3.943
0
1.197
0.795
0
0.693
0
0
0
Description
(TI = 85 °C, V
DD
= min, V
DD
2 = min)
Min
Max
Unit
maenn
mwdataenn
datafmfpga[31:0]
(dual-port mode)
datafmfpgax[3:0]
(dual-port mode)
mwdata[17:0]
(quad-port mode)
trdata[17:0]
(quad-port mode)
mwlastcycn
mrdataenn
taenn
twdataenn
trdataenn
6.426
6.452
7.344
5.226
7.205
7.344
6.680
5.371
5.048
5.099
5.919
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
相關PDF資料
PDF描述
OR3TP12-6BA352 Quad 2.3V 10 MHz OP, I temp, -40C to +85C, 14-PDIP, TUBE
OR3TP12-6BA352I Quad 2.3V 10 MHz OP, I temp, -40C to +85C, 14-TSSOP, TUBE
OR3TP12-6PS240 Single 2.3V 10 MHZ OP, -40C to +125C, 14-SOIC 150mil, T/R
OR3TP12-6PS240I Quad 2.3V 10 MHz OP, I temp, -40C to +85C, 14-SOIC 150mil, T/R
OR3TP12 Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
相關代理商/技術(shù)參數(shù)
參數(shù)描述
OR3TP126BA256I-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 2016 LUT 187 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
OR3TP12-6BA352 制造商:未知廠家 制造商全稱:未知廠家 功能描述:User Programmable Special Function ASIC
OR3TP126BA352-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 2016 LUT 187 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
OR3TP12-6BA352I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:User Programmable Special Function ASIC
OR3TP126BAN256-DB 制造商:Lattice Semiconductor Corporation 功能描述:
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