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參數(shù)資料
| 型號(hào)： | OQ2541BHP |
| 英文描述： | CLOCK/DATA RECOVERY|BIPOLAR|QFP|48PIN|PLASTIC |
| 中文描述： | 時(shí)鐘/數(shù)據(jù)恢復(fù)|雙極| QFP封裝| 48PIN |塑料 |
| 文件頁(yè)數(shù)： | 14/40頁(yè) |
| 文件大?。?/td> | 292K |
| 代理商： | OQ2541BHP |
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2000 Sep 18
14
Philips Semiconductors
Product specification
SDH/SONET data and clock recovery unit
STM1/4/16 OC3/12/48 GE
OQ2541BHP; OQ2541BU
CHARACTERISTICS
V
EE
=
3.35 V; T
amb
=
10 to +85
°
C; typical values measured at T
amb
= 25
°
C; all voltages are measured with respect
to GND.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
V
EE
I
EE
P
tot
Data and clock inputs: pins DIN, DINQ, CREF and CREFQ
negative supply voltage
negative supply current
total power dissipation
see Fig.12; note 1
50
loaded; see Fig.13
3.50
3.35
125
400
3.10
160
560
V
mA
mW
V
i(p-p)
input voltage
(peak-to-peak value)
input sensitivity
(peak-to-peak value)
DC input offset voltage
input voltage
input impedance
50
measurement system;
see Fig.10; notes 2 and 3
50
measurement system;
notes 2 and 4
50
measurement system
50
measurement system
single-ended; see Fig.4; note 5
7
200
450
mV
V
i(sens)(p-p)
2.5
7
mV
V
IO
V
I
Z
i
Data and clock outputs: pins DOUT, DOUTQ, DLOOP, DLOOPQ, COUT, COUTQ, CLOOP and CLOOPQ
50
measurement system;
single-ended; see Fig.10
default adjustment; note 6
special adjustment; note 7
V
O
output voltage
Z
o
output impedance
single-ended
t
r(C)
clock output rise time
differential; 20% to 80%
t
f(C)
clock output fall time
differential; 20% to 80%
t
r(D)
data output rise time
differential; 20% to 80%
t
f(D)
data output fall time
differential; 20% to 80%
t
d(D-C)
data-to-clock delay
see Figs. 11 and 14; note 8
Output amplitude adjustment: pin AREF
3
600
0
200
50
+3
+250
mV
mV
V
o(p-p)
output voltage swing
(peak-to-peak value)
170
50
600
220
200
100
50
50
120
120
260
210
400
0
300
mV
mV
mV
ps
ps
ps
ps
ps
V
AREF
output amplitude reference
voltage
floating pin
110
100
90
mV
Power control output: pin PC
g
m
I
O
Loop mode enable input: pins ENL, ALLON and BYPASS
transconductance
output current
84
1
60
42
3.5
mA/V
mA
V
IL
V
IH
LOW-level input voltage
HIGH-level input voltage
0.8
3.3
2.0
0.8
2.0
5.0
V
V
V
see descriptions of ENL,
ALLON and BYPASS
Phase lock indicator: pin LOCK
V
OL
V
OH
LOW-level output voltage
HIGH-level output voltage
note 9
note 9
0.6
3.3
V
V
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