參數(shù)資料
型號(hào)： OQ2541BHP
英文描述： CLOCK/DATA RECOVERY|BIPOLAR|QFP|48PIN|PLASTIC
中文描述： 時(shí)鐘/數(shù)據(jù)恢復(fù)|雙極| QFP封裝| 48PIN |塑料
文件頁(yè)數(shù)： 11/40頁(yè)
文件大?。?/td> 292K
代理商： OQ2541BHP
2000 Sep 18
11
Philips Semiconductors
Product specification
SDH/SONET data and clock recovery unit
STM1/4/16 OC3/12/48 GE
OQ2541BHP; OQ2541BU
Table 3
STM mode select
MODE
BIT RATE
(Mbits/s)
DIVISION
FACTOR
LEVEL ON PIN
DOUT155
DOUT622
DOUT1250
STM1/OC3
STM4/OC12
Gigabit Ethernet
STM16/OC48
155.52
622.08
1250.00
2488.32
16
4
2
1
V
EE
ground
ground
ground
V
EE
V
EE
ground
ground
V
EE
V
EE
V
EE
ground
Application with positive supply voltage
The versatile design of the OQ2541B also allows it to
operate in a positive supply voltage application, although
some pins have a different mode of operation. This section
deals with these differences and supports the user with
achieving a successful application of the OQ2541B in a
5 V environment.
A
PPLICATION DIAGRAM
Fig.32 shows a sample application diagram. It should be
noted that all pins GND are now connected to V
CC
and all
pins V
EE
are connected to the regulated voltage from the
power controller.
O
UTPUT SELECTION
In a positive supply voltage application, the functions of
pins ENL, ALLON and BYPASS are different than in a
negative supply application, see also Table 4.
The functions can be activated by a voltage more than
2.0 V lower than 5.0 V (V
CC
). Preferably, they should be
connected to V
EE
(pin 25), which is approximately 3.3 V
below V
CC
. If the pins do not differ by more than 0.8 V
of V
CC
(5.0 V), the functions are deactivated.
If the pin is connected to GND (0 V) in the negative supply
application, it should now be connected to 5.0 V (the
voltage on pins GND). If the pin is connected to a positive
voltage >0.8 V in the negative supply application, then it
should be connected to V
EE
(pin 25, approximately 3.3 V
below V
CC
). Beware not to connect pins ENL, ALLON or
BYPASS to a voltage lower than that on pin 25, because
this causes serious damage to the OQ2541B.
L
OSS OF SIGNAL AND LOCK DETECTION
In the negative supply application, pins LOS and LOCK
are open-collector outputs that require pull-up resistors to
a positive supply voltage.
In the positive supply application, the pull-up voltage
needstobehigherthanthepositivesupplyvoltageandthe
signals on pins LOS and LOCK would no longer be
TTL compatible. However, the internal circuit on pins LOS
and LOCK can be used in a current mirror configuration
(see Fig.9). This requires only an external PNP transistor
(e.g. BC857 or equivalent) to mirror the current. A 10 k
pull-down resistor from the collector of the external
transistor to ground yields a TTL compatible signal again,
albeitinverted.Table 5showsthemeaningoftheLOSand
LOCK flags, when used in the positive supply application.
CAUTION
Do not connect pins ENL, ALLON or BYPASS to ground,
because this will destroy the IC.
handbook, halfpage
MGL671
GND
BC857
+
5 V
signal out
LOS,
LOCK
10 k
off chip
on chip
Fig.9
Signal out for LOS and LOCK indications in
a positive supply voltage application.
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