參數(shù)資料
型號： OQ2541BHP
英文描述： CLOCK/DATA RECOVERY|BIPOLAR|QFP|48PIN|PLASTIC
中文描述： 時鐘/數(shù)據(jù)恢復(fù)|雙極| QFP封裝| 48PIN |塑料
文件頁數(shù)： 12/40頁
文件大?。?/td> 292K
代理商： OQ2541BHP
2000 Sep 18
12
Philips Semiconductors
Product specification
SDH/SONET data and clock recovery unit
STM1/4/16 OC3/12/48 GE
OQ2541BHP; OQ2541BU
Table 4
Output selection in a positive supply voltage application
Table 5
LOS and LOCK indication in a positive supply voltage application
MODE
LEVEL ON PIN
OUTPUT
ENL
ALLON
BYPASS
DLOOP,
DLOOPQ,
CLOOP AND
CLOOPQ
DOUT, DOUTQ,
COUT AND
COUTQ
DCR loop
DCR all outputs
DCR normal
Bypass loop
Bypass all outputs
Bypass normal
V
CC
(5 V)
V
EE
(V
CC
3.3 V) V
CC
(5 V)
V
CC
(5 V)
V
CC
(5 V)
V
EE
(V
CC
3.3 V) V
CC
(5 V)
V
CC
(5 V)
active
active
active
active
active
active
active
active
V
CC
(5 V)
V
EE
(V
CC
3.3 V)
V
CC
(5 V)
V
EE
(V
CC
3.3 V) V
EE
(V
CC
3.3 V)
V
EE
(V
CC
3.3 V) V
CC
(5 V)
V
EE
(V
CC
3.3 V)
SIGNAL
DESCRIPTION
LEVEL
TTL
LOS active
LOS inactive
LOCK active
loss of signal: BER > 5
×
10
2
no loss of signal: BER < 1
×
10
3
reference clock present and VCRO
inside 1000 ppm window
no reference clock present or VCRO
outside 1000 ppm window
0 V (ground)
5 V (V
CC
)
0 V (ground)
LOW
HIGH
LOW
LOCK inactive
5 V (V
CC
)
HIGH
D
IVIDER SETTINGS
The reference frequency dividers and the STM mode
selectorsstilloperatethe sameina positivesupplyvoltage
application. The only difference is that pins formerly
connected to ground should now be connected to
V
CC
(5 V).Pinsconnectedto V
EE
shouldstillbeconnected
to V
EE
because connecting these pins to ground (0 V) will
damage the IC.
RF
INPUT AND OUTPUTS
All RF inputs, outputs and internal signals of the OQ2541B
are referenced to pins GND. In the positive supply voltage
application, this means that all RF signals are referenced
to V
CC
. Therefore, a clean V
CC
rail is of utmost importance
for proper RF performance. The best performance is
obtained when the transmission line reference plane is
also decoupled to V
CC
. Careful design of V
CC
and good
decoupling schemes should be taken into account. While
designing the printed-circuit board, bear in mind that the
V
CC
has become what was formerly ground.
While laying out the application, the return path is the most
important issue to be considered. It is always advised to
carefully examine the current carrying loops in the design.
Care should be taken that low ohmic and low inductance
return paths are available for all frequencies (both of
interest and not of interest). These return paths should
preferably have an enclosed area as small as possible,
both horizontally and vertically (by means of through-holes
or vias). The position of a decoupling capacitor is very
important. A decoupling capacitor at an unfavourable
position could do more damage than completely omitting
the capacitor, while at the right location it might mean the
difference between mediocre results and the ultimate
achievement.
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