ELECTRICAL CHARACTERISTICS: VS = ±6V OPA659 www.ti.com <" />
參數(shù)資料
型號(hào)： OPA659IDBVR
廠商： Texas Instruments
文件頁(yè)數(shù)： 23/32頁(yè)
文件大小： 0K
描述： IC OPAMP JFET 650MHZ SGL SOT23-5
標(biāo)準(zhǔn)包裝： 3,000
放大器類型： J-FET
電路數(shù)： 1
轉(zhuǎn)換速率： 2550 V/µs
增益帶寬積： 350MHz
-3db帶寬： 650MHz
電流 - 輸入偏壓： 10pA
電壓 - 輸入偏移： 1000µV
電流 - 電源： 32mA
電流 - 輸出 / 通道： 70mA
電壓 - 電源，單路/雙路(±)： ±3.5 V ~ 6.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： SC-74A，SOT-753
供應(yīng)商設(shè)備封裝： SOT-23-5
包裝： 帶卷 (TR)
ELECTRICAL CHARACTERISTICS: VS = ±6V
www.ti.com ............................................................................................................................................ SBOS342B – DECEMBER 2008 – REVISED AUGUST 2009
At RF = 0, G = +1V/V, and RL = 100, TA = +25°C, unless otherwise noted.
OPA659
TEST
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
LEVEL(1)
AC PERFORMANCE
Small-Signal Bandwidth
VO = 200mVPP, G = +1V/V
650
MHz
C
VO = 200mVPP, G = +2V/V
335
MHz
C
VO = 200mVPP, G = +5V/V
75
MHz
C
VO = 200mVPP, G = +10V/V
35
MHz
C
Gain Bandwidth Product
G > +10V/V
350
MHz
C
Bandwidth for 0.1dB Flatness
G = +2V/V, VO = 2VPP
55
MHz
C
Large-Signal Bandwidth
VO = 2VPP, G = +1V/V
575
MHz
B
Slew Rate
VO = 4V Step, G = +1V/V
2550
V/
s
B
Rise and Fall Time
VO = 4V Step, G = +1V/V
1.3
ns
C
Settling Time to 1%
VO = 4V Step, G = +1V/V
8
ns
C
Pulse Response Overshoot
VO = 4V Step, G = +1V/V
12
%
C
Harmonic Distortion
VO = 2VPP, G = +1V/V, f = 10MHz
2nd harmonic
–79
dBc
C
3rd harmonic
–100
dBc
C
VO= 2VPP Envelope (each tone 1VPP),
Intermodulation Distortion
G = +2V/V, f1 = 10MHz, f2 = 11MHz
2nd intermodulation
–72
dBc
C
3rd intermodulation
–96
dBc
C
Input Voltage Noise
f > 100kHz
8.9
nV/
√Hz
C
Input Current Noise
f < 10MHz
1.8
fA/
√Hz
C
DC PERFORMANCE
Open-Loop Voltage Gain (AOL)
TA = +25°C, VCM = 0V, RL = 100
52
58
dB
A
TA = –40°C to +85°C, VCM = 0V, RL = 100
49
55
dB
B
Input Offset Voltage
TA = +25°C, VCM = 0V
±1
±5
mV
A
TA = –40°C to +85°C, VCM = 0V,
±1.5
±7.6
mV
B
DRB package
TA = –40°C to +85°C, VCM = 0V,
±1.5
±8.9
mV
B
DBV package
TA = –40°C to +85°C, VCM = 0V,
Average offset voltage drift(2)
±10
±40
V/°C
B
DRB package
TA = –40°C to +85°C, VCM = 0V,
±10
±60
V/°C
B
DBV package
Input Bias Current
TA = +25°C, VCM = 0V
±10
±50
pA
A
TA = 0°C to +70°C, VCM = 0V
±240
±1200
pA
B
TA = –40°C to +85°C, VCM = 0V
±640
±3200
pA
B
TA = 0°C to +70°C, VCM = 0V
±5
±26
pA/°C
B
Average input bias current drift
TA = –40°C to +85°C, VCM = 0V
±7
±34
pA/°C
B
Input Offset Current
TA = +25°C, VCM = 0V
±5
±25
pA
A
TA = 0°C to +70°C, VCM = 0V
±120
±600
pA
B
TA = –40°C to +85°C, VCM = 0V
±320
±1600
pA
B
(1)
Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
(2)
DRB package only.
Copyright 2008–2009, Texas Instruments Incorporated
3
Product Folder Link(s): OPA659
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