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參數(shù)資料
| 型號： | OCX160-PPT |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | OCX160 Crosspoint Switch |
| 中文描述： | OCX160交叉點(diǎn)開關(guān) |
| 文件頁數(shù)： | 8/44頁 |
| 文件大?。?/td> | 710K |
| 代理商： | OCX160-PPT |
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OCX160 Crosspoint Switch
—
Preliminary Data Sheet
8
[Rev. 1.6] 2/20/01
I-Cube, Inc.
1.1
Input and Output Buffers
All of the input buffers are differential inputs with flow-through mode. The output buffers are
programmable for either flow-through or registered mode. Figure 3 shows the basic block diagram of the
input and output blocks with the sources for the output control signals (OE# and CLK). The control signals
are explained in more details in the following sections.
Figure 3
Input and Output Buffer Configuration
1.1.1
Input and Output Port Function Mode
The following legend describes the various modes of the Input and Output Ports and the
specification used by the OCXPro
Software.
Legend:
Ax
–
Switch Matrix Signal
Px
–
Port Signal
OE#
–
Output Enable (# means
“
Active Low
”
)
CLK
–
Clock
Table 1
Summary for Programmable I/O Attributes for OCX160
Symbol
I/O Port Function
Mnemonic
Input
–
The external signal is buffered from the Input Port pin
to the corresponding Switch Matrix line.
IN
Output
–
The internal signal is buffered from the
corresponding Switch Matrix line to the Output Port pin. In
this mode an optional output enable (OE#) can be selected.
The default state is logic high with enable set to ON.
OP
Registered Output
–
The internal signal on the Switch Matrix
line is registered by an edge-triggered register within the
Output Port. A clock source is required in this mode. An
output enable (OE#) is available but not required.
RO
No Connect
–
In this mode, the output Port pin is isolated
from the Switch Matrix.
NC
CLK
Switch
Matrix
Input
D
Q
Next
Neighbor
Output
OE#
Output Mode
Select
Clock
Select
Px
Ax
OE#
Px
Ax
CLK
D
Q
OE#
Px
Ax
Ax
Px
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