參數(shù)資料
型號(hào)： NRF9E5-EVKIT868
廠商： Electronic Theatre Controls, Inc.
英文描述： 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC
中文描述： 433/868/915MHz RF收發(fā)器與8051兼容的嵌入式微控制器和4輸入，10位ADC
文件頁數(shù)： 31/104頁
文件大?。?/td> 1436K
代理商： NRF9E5-EVKIT868
PRODUCT SPECIFICATION
nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989
Revision: 1.1
Page 31 of 104
June 2004
10.2.2
Measurements with Internal Reference
When VFSSEL is set to 0 and CHSEL selects an input AINI (i.e. AIN0 to AIN3), the
result in ADCDATA is directly proportional to the ratio between the voltage on the
selected input and the internal bandgap reference (nominally 1.22V):
N
AINi
ADCDATA
2
V
22
.
=
and for differential measurements a similar equation apply:
N
N
AIN
AINi
ADCDATA
V
V
2
2
22
.
=
)
(
0
Where N is the number of bits set in RESCTRL
This mode of operation is normally selected for sources where the voltage is not
depending on the supply voltage.
10.2.3
Supply Voltage Measurement
When CHSEL is set to [1xxx], the ADC will use the internal bandgap reference
(nominally 1.22V). The input to the converter is 1/3 of the voltage on the VDD pins.
The result in ADCDATA is thus directly proportional to the VDD voltage.
N
VDD
V
ADCDATA
2
66
.
=
Where N is the number of bits set in RESCTRL
10.3
AD Converter Sampling and Timing
An AD conversion is initialized after a low to high transition on CSTASRT in
ADC_CONFIG_REG or by using the instruction START_ADC_CONV. In both cases
the conversion itself would start at the first positive edge of ADCCLK after RACSN is
set high after instruction is issued.
When ADCRUN is low, a single conversion would be performed and a pulse on EOC is
generated when the converted value is available in ADC_DATA_REG. If CSTARTN is
set low or a new START_ADC_CONV command is issued, the previous conversion
will be aborted. Conversion time, t
conv
, depends on resolution.
cycles
ADCCLK
N
2
+
t
conv
3
=
Where N is the number of resolution bit. In Figure 8 a 10-bit conversion is shown.
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