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| 型號： | NCV7380DR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 3/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSCEIVER LINEAR 8-SOIC |
| 產(chǎn)品變化通告： | Product Discontinuation 21/Jun/2007 |
| 標準包裝： | 2,500 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | LIN |
| 電源電壓： | 7 V ~ 18 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
NCV7380
http://onsemi.com
11
Figure 8. Duty Cycle Measurement and Calculation in Accordance to LIN Physical Layer Specification 2.0
VSUP
TxD
RxD
BUS
GND
tBit
100%
tdom(max)
tdom(min)
58.1%
28.4%
74.4%
42.2%
trec(max)
58.1%
28.4%
trec(min)
0%
Duty Cycle Calculation
With the timing parameters shown in Figure 8 two duty
cycles, based on trec(min) and trec(max) can be calculated as
follows:
D1* = trec(min)/(2 x tBit)
D2* = trec(max)/(2 x tBit)
For proper operation at 20 KBit/s (bit time is 50
ms) the
LIN driver has to fulfill the duty cycles specified in the AC
characteristics for supply voltages of 7...18 V and the three
defined standard loads.
Due to this simple definition there is no need to measure
slew rates, slope times, transmitter delays and dominant
voltage levels as specified in the LIN physical layer
specification 1.3.
The devices within the D1/D2 duty cycle range also
operates in applications with reduced bus speed of
10.4 kBit/s or below.
In order to minimize EME, the slew rates of the
transmitter can be reduced (by up to
[ 2 times). Such
devices have to fulfill the duty cycle definition D3/D4 in
the LIN physical layer specification 2.0. Devices within
this duty cycle range cannot operate in higher frequency
20 kBit/s applications.
*D1 and D2 are defined in the LIN protocol specification 2.0.
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