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參數(shù)資料
| 型號： | NCV7361ADR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | Buffer和線驅(qū)動 |
| 英文描述： | Voltage Regulator with Integrated LIN Transceiver; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 18/27頁 |
| 文件大?。?/td> | 272K |
| 代理商： | NCV7361ADR2G |
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NCV7361A
http://onsemi.com
25
Connection to FlashMCU
During programming of a flash MCU the NCV7361A
should be disconnected from the MCU. This can be done
by disconnecting the supply voltage of the NCV7361A or
by turning off the NCV7361A with the EN pin. A blocking
diode must be used between the MCU and the RxD pin to
avoid loading of the programming data.
The programming of the flash is also possible via the
LIN pin, if the MCU supports this kind of flash mode.
NCV7361A
VOUT
RESET
TxD
RxD
+
mC
Figure 38. Example Circuitry for Connection of RxD to MCU for Flash Programming
47nF...100nF
Prog.Data
0.7 V
Vhigh_RxD > 4.7 V at VDD = 5 V
Vlow_RxD = 0.8 V
Vhigh = 4 V at VDD = 5 V
10mF...47mF
Operating During Disturbance
Operating Without VSUP or GND
The BUS pin is designed for voltages of GND 24 V up
to GND + 30 V. This prevents loss of communication
between other bus nodes with the loss of VSUP or loss of
GND. The BUS pin will remain at VBAT and current draw
will be minimal with the loss of GND or VSUP.
Short Circuit BUS to VBAT
Recessive LIN bus is blocked, no influence to the
NCV7361A
Dominant Current limit, thermal shutdown of
NCV7361A if power dissipation raises TJ
Short Circuit BUS to GND
The LIN bus is blocked. There is no influence to the
NCV7361A.
Short Circuit TxD to GND
The LIN transceiver is permanent in the dominant state
as is the LIN bus. This state can only be detected from the
LIN controller. In this case the controller must switchoff
the LIN node via the EN input of the NCV7361A and look
for a recessive state. A thermal shutdown of NCV7361A
will appear if the thermal shutdown threshold is exceeded.
TxD Open
The internal pullup resistor forces the LIN node to the
recessive state. The communication between the other
busnodes will not be disturbed.
Short Circuit VOUT to GND
The VOUT pin is protected via a current limit. This state
is comparable with the behavior in the sleep mode.
Overload of VOUT
Thermal SwitchOff
The power dissipation is increasing if the load current is
between IVOUT_max and ILVOUT. If the IC exceeds the
thermal shutdown threshold of > 155
°C, the transceiver
will be switched off. The voltage regulator will also be
switched off and a reset signal is forced.
Overcurrent
If the current limit is active the voltage on VOUT drops
down. If this voltage is below the threshold VRES, a reset
will be forced.
Undervoltage VSUP, VOUT
The reset circuit guarantees the correct behavior of the
driver during undervoltage. The BUS pin generates the
recessive state if VOUT < VMRes. The inputs EN and TxD
have pulldown and pullup circuits respectively.
If VMRes v VOUT v 4.5 V the TxD signal is transmitted
to the bus. The receive mode is also active.
Short Circuit RxD, RESET to GND or VOUT
Both outputs are short circuit proof to VOUT and ground.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NCV7380 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:LIN Transceiver |
| NCV7380/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LIN Transceiver |
| NCV7380_07 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:LIN Transceiver |
| NCV7380D | 功能描述:IC TRANSCEIVER LINEAR 8-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
| NCV7380DG | 功能描述:IC TRANSCEIVER LINEAR 8-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
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