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參數(shù)資料
| 型號： | NCV7361ADR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | Buffer和線驅(qū)動 |
| 英文描述： | Voltage Regulator with Integrated LIN Transceiver; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 15/27頁 |
| 文件大?。?/td> | 272K |
| 代理商： | NCV7361ADR2G |
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NCV7361A
http://onsemi.com
22
Figure 34. Safe Operating Area
5
60
17
40
18
15
14
VSUP (V)
I V
CC_
ma
x(mA)
30
10
0
616
19
7
20
13
12
11
10
89
50
SOIC8
TA = 125°C
TJ = 150°C
maximum current
max.
supply
voltage
SOIC8
TA = 85°C
TJ = 125°C
SOIC8
TA = 85°C
TJ = 150°C
The linear regulator of the NCV7361A operates with
input voltages up to 18 V and can output a current of
50 mA. The maximum power dissipation limits the
maximum output current at high input voltages and high
ambient temperatures. The output current of 50 mA at an
ambient temperature of TA = 125°C is only possible with
small voltage differences between VSUP and VCC. See
Figure 34 for safe operating areas for different ambient and
junction temperatures.
Regulator Circuitry
Low Dropout Regulator
The voltage regulator of the NCV7361A is a low dropout
regulator
(LDO)
with
a
PMOSFET
as
the
driving transistor.
This type of regulator has a standard pole, generated
from the internal frequency compensation and an
additional pole, which is dependent from the load and the
load capacity. This additional pole can cause an instable
behavior of the regulator! It requires a zero point to
compensate this additional pole. It can be realized via an
additional load resistor in series with a load capacity. It is
used
for
this
compensation
the
Equivalent Series Resistance (ESR) of the load capacity.
Every real capacity is characterized with an ESR value.
With the help of this ESR value an additional zero point is
implemented into the amplification loop and therefore the
result of the negative phase shift is compensated.
Because of this correlation the regulator has a stable
operating area which is defined by the load resistance RL,
the load capacity CLand the corresponding ESR value. The
load resistance resp. load current is defined by the
application itself and therefore the compensation of the
pole can only be done via variation of the load capacity and
ESR value.
Input Capacity on VSUP CIN
It is necessary to have an input capacity of CIN = 4.7 mF.
Higher capacity values improve the line transient response
and the supply noise rejection behavior. The combination
of electrolytic capacity (e.g.100
mF) in parallel with a
ceramic RFcapacity (e.g. 100 nF) archives good
disturbance suppressing.
The input capacity should be placed as close as possible
(< 1 cm) to the VSUP pin.
Load Capacity on VOUT CL
The regulator is stabilized by the output capacitor CL.
The NCV7361A requires a minimum of 4.7
mF capacity
connected to the 5.0 V output to insure stability. This
capacitor should maintain its ESR in the stable region of the
ESR curve (Figure 35) over the full operating temperature
range of the application. The capacity value and the ESR
of a capacitor changes with temperature. The minimal
capacity value must be kept within the whole operating
temperature range.
Example 1:
The regulator is stabilized using a 47
mF aluminum
electrolytic capacitor load (ESR = 0.7
W @ 25°C). The
capacitance decreases to 42
mF and the ESR increases to
8.9
W at an ambient temperature of 40°C. The ESR value
is located in the unstable region. The regulator will be
unstable at 40
°C.
Example 2:
The regulator is stabilized using a 47
mF tantalum
capacitor load (ESR = 0.1
W @ 25°C). The capacitance
decreases to 45
mF and the ESR increases to 0.11 W at an
ambient temperature of 40
°C. The ESR value is located
in the stable region. The regulator will be stable at 40
°C.
Figure 35. ESR Curves for 6.8 mF 3 CL 3 100 mF and
Frequency of 100 kHz
0
100
Load Current (mA)
ESR
@
100
kHz
(Ohm)
1
0.1
0.01
40
50
30
20
10
Unstable Region
Stable Region
The value and type of the output capacitor can be
selected by using the diagram shown in Figure 35.
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