參數(shù)資料
型號: NCP1651DR2G
廠商: ON Semiconductor
文件頁數(shù): 23/32頁
文件大小: 779K
描述: IC PFC CONTROLLER CCM/DCM 16SOIC
標(biāo)準(zhǔn)包裝: 1
模式: 連續(xù)導(dǎo)電(CCM),間歇導(dǎo)電(DCM)
頻率 - 開關(guān): 25kHz ~ 250kHz
電流 - 啟動: 8.5mA
電源電壓: 10 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: NCP1651DR2GOSDKR
NCP1651
http://onsemi.com
23
allows for a repeatable, fast restart. See Figure 3 for timing
diagram.
The unit will remain operational as long as the V
CC
voltageremainsabovetheUVLOundervoltagetrippoint.If
the V
CC
voltage is reduced to the undervoltage trip point,
operationoftheunitwillbedisabled,thestartupcircuitwill
againbeenabled,andwillchargetheV
CC
capuptotheturn
onvoltagelevel.Atthispointthestartupcircuitwillturnoff
and the unit will remain in the shutdown mode. This will
continue for the next seven cycles. On the eighth cycle, the
NPC1651willagainbecomeoperational.IftheV
CC
voltage
remains above the undervoltage trip point the unit will
continue to operate, if not the unit will begin another
divide- -by- -eight cycle.
The purpose of the divide- -by- -eight counter is to reduce
thepowerdissipationofthechipunder overloadconditions
and allow it to recycle indefinitely without overheating the
chip.
Itiscriticalthattheoutputvoltagereachesalevelthatallows
theauxiliaryvoltagetoremainabovetheUVLOturn- -offlevel
before the V
CC
cap has discharged to that level. If the bias
voltage generated by the inductor winding fails to exceed the
shutdown voltage before the capacitor reduces to the UVLO
undervoltageturn- -offlevel,theunitwillshutdownandgointo
adivide- -by- -eightcycle,andwillneverstart.Ifthisoccurs,the
V
CC
capacitor value should be increased.
Soft- -Start Circuit
The AC error amplifier has been configured such that a
low output level will cause the output duty cycle to go to
zero. This will have the effect of soft- -starting the unit at
turn- -on, since the output is coupled to ground through a
capacitor.
There will be an initial offset of the output voltage due to
the output current and the resistor at pin 11. For example, if
the output is saturated in the high state at turn on, it will
source 50 mA. If pin 11 is terminated with a 2.2 k?resistor
and a 0.01 F capacitor, the initial step will be:
50 mA ?2.2 k = 0.11 volts
and the rate of rise will be:
50 mA0.01 mF = 5 mVms
or,560msuntiltheoutputisat2.8volts,whichcorresponds
to full duty cycle.
There is also a clamp on pin 8 that will keep the
capacitance on that pin discharged to 1.5 volts so that the
FB/SD signal will also slew up from a low power level to a
high power level. When the unit is in standby mode, the
clamp will be enabled. At the same time as the unit is
enabled, the clamp will be disabled to allow the feedback
signal to control the loop.
An external soft- -start circuit can be added, as shown in
Figure 24, if additional time is desired.
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