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參數(shù)資料
| 型號： | NCP1651DR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 19/32頁 |
| 文件大?。?/td> | 779K |
| 描述： | IC PFC CONTROLLER CCM/DCM 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 模式： | 連續(xù)導(dǎo)電（CCM），間歇導(dǎo)電（DCM） |
| 頻率 - 開關(guān)： | 25kHz ~ 250kHz |
| 電流 - 啟動： | 8.5mA |
| 電源電壓： | 10 V ~ 18 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | NCP1651DR2GOSDKR |
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NCP1651
http://onsemi.com
19
The reference multiplier contains an internal loading
resistor, with a nominal value of 25 k? This is because the
resistor that converts the A input voltage into a current is
internal. Making both of these resistors internal, allows for
good accuracy and good temperature performance. Only a
capacitorneedstoaddedexternallytoproperlycompensate
this multiplier. It is not recommended that an external
parallel resistor be used at the Ref Gain pin, due to
tolerance variations of the internal resistor.
There is an offset in the compensation (A- -input) to the
referencemultiplier.ItisduetotheV- -Iconverterthatfeeds
the input.
The FB/SD signal is buffered by a voltage- -to- -current
converter for the appropriate signal into the multiplier. The
schematic for that converter follows.
Figure 33. Multiplier V- -I Converter
1.5 V
CURRENT
MIRROR
--
+
20 k
3.8 k
8
FB/SD
Reference Multiplier
V
fb
6 X i
1
i
1
i
mult
The output current for this stage is:
i
mult
=
6 (V
fb
1.5 V)
20 k
Figure 34. Reference Multiplier Clamp Circuit
Multiplier
25 k
AC Ref
4.5 V
AC Error
Amplifier
1 k
--
+
10
Thereisa1kresistorbetweentheACRefpinandtheAC
ErrorAmplifierforESDprotection.Duetothisresistor,the
voltageonpin10(ACRef)willexceed4.5voltsundersome
conditions, but the maximum voltage at the non- -inverting
AC Error Amplifier input will be clamped at 4.5 volts.
Feedback/Shutdown
The FB/SD pin is a multiple function pin. Its primary
function isto port the error signal to the voltage- -to- -current
converter that feeds the reference multiplier. The operating
rangeforthefeedbacksignalisfrom1.0to4.0volts.Below
an input level of 1.5 volts, the PWM duty cycle is reduced
to zero. At 4.0 volts the PWM is operating at its maximum
duty cycle.
The signal at this pin is also sensed by an internal
comparator that will shutdown the unit if the voltage falls
below 0.60 volts. Under normal operating conditions the
signal at this input will be 1.5 volts or greater, and the
shutdown circuit will be inactive. This circuit is designed
such that a 680 Ohm resistor in series with the optocoupler
willassurethattheconverterwillgotozerodutycyclewhen
theoptoisonfull,butwillnotgolowenoughtoputtheunit
into its shutdown mode.
Theshutdownfunctioncanbeusedformultiplepurposes
including overvoltage, undervoltage or hot- -swap control.
An external transistor, open collector or open drain gate,
connected to this pin can be used to pull it low, which will
inhibit the operation of the chip, and change the operating
state to a low power standby mode. An example of a
shutdown circuit is shown in Figure 23.
Ramp Compensation
The Ramp Compensation pin allows the amount of ramp
compensation to be adjusted for optimum performance.
Ramp compensation is necessary in a current mode
convertertostabilizetheunitsoperationwhenthedutycycle
is greater than 50%.
The amount of compensation required is dependant on
severalvariables,includingtheboostinductorvalue,andthe
desires of the designer. The value should be based on the
fallingdi/dtoftheinductorcurrent.Foraboostinductorwith
a variable input voltage, this will vary over the AC input
cycle, and with changes in the input line. A di/dt chart is
included in the design spreadsheet that is available for the
NCP1651.
For optimum load transient performance, the ramp
compensation should equal the falling di/dt at 100% duty
cycle. For optimum line transient response, it should equal
one half of the falling di/dt at 100% duty cycle.
This pin is a buffered output of the oscillator, which
providesavoltageequaltotherampontheoscillatorC
T
pin.
A resistor from this pin to ground, programs a current that
is transformed via a current mirror to the non- -inverting
input of the PWM comparator.
The ramp voltage due to the inductor di/dt at the input to
the PWM comparator is the current shunt voltage at pin 5
multiplied by 10, which is the gain of the current amplifier
output that feeds the PWM.
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