參數(shù)資料
型號: NCN6004AFTBR2G
廠商: ON Semiconductor
文件頁數(shù): 13/40頁
文件大?。?/td> 0K
描述: IC INTERFACE SAM/SIM DUAL 48TQFP
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: PC,PDA
接口: 微控制器
電源電壓: 1.8 V ~ 5.5 V
封裝/外殼: 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 標(biāo)準(zhǔn)包裝
安裝類型: 表面貼裝
其它名稱: NCN6004AFTBR2GOSDKR
NCN6004A
http://onsemi.com
20
CARD DETECTION
The card detector circuit provides a constant low current to
bias the CRD_DET_A and CRD_DET_B pins, yielding a
logic High when no card is present and the external switch is
Normally Open type. The internal logic associated with pins
20 and 41 provides a programmable selection of the slope
card detection. The transition is filtered out by the internal
digital filter circuit, avoiding false interrupt. In addition to
the typical 50
ms delay, the MPU shall provide an additional
delay to cope with the mechanical stabilization of the card
interface (typically 1 ms), prior to valid the CRD_VCC_A or
CRD_VCC_B supply.
When a card is inserted, the detector circuit asserts
INT = Low as depicted before, the external
mP being
responsible to clear the interrupt signal, taking the
necessaries actions. When the NCN6004A detects a card
extraction, the power down sequence is automatically
activated for the related interface section, regardless of the
PWR_ON state, and the INT pin is asserted Low. It is up to
the external MPU to clear this interrupt by pulsing the CS
pin.
CRD_DET_A
STATUS
A0
A1
INTERRUPT
CARD IDENTIFICATION
CLEAR INTERRUPT
CARD PRESENT: STATUS = 1
CARD NOT PRESENT: STATUS = 0
CARD EXTRACTED
50
ms < T < 150 ms
High
50
ms < T < 150 ms
CLEAR INTERRUPT
A2
A3
CARD_SEL
High = Card A
IRRELEVANT
Figure 11. Typical Interrupt Sequence
PGM
INT
CS
ACKNOWLEDGE
& PROCESSING
The interrupt signal can be cleared either by a positive
going slope on the Chip Select pin as depicted in Figure 11,
or by forcing the PWR_ON signal High (keeping CS = Low)
for the related card.
The polarity of the card detection switch can be either
Normally Open or Normally Close and is software
controlled as defined here below and in Table 2.
Table 5. Card Detection Polarity
CS
PGM
A3
A2
A1
A0
CARD_SEL
CRD_DET_A
CRD_DET_B
1
X
Qn 1
0
1
X
Qn 1
0
1
0
1
Normally Open
Qn 1
0
1
0
1
Normally Close
Qn 1
0
1
0
Qn 1
Normally Open
0
1
0
1
0
Bn 1
Normally Close
*The polarity change is validated upon the next positive PGM transient.
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