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參數(shù)資料
| 型號(hào)： | NB3N3001 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 3.3 V 106.25 MHz/ 212.5 MHz PureEdge Clock Generator with LVPECL Differential Output(帶LVPECL差分輸出的3.3V 106.25MHz/212.5MHz PureEdge 時(shí)鐘生成器) |
| 中文描述： | 3.3伏106.25兆赫/ 212.5兆赫的PureEdge時(shí)鐘發(fā)生器可與LVPECL差分輸出（帶的LVPECL差分輸出的3.3 106.25MHz/212.5MHz的PureEdge時(shí)鐘生成器） |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 114K |
| 代理商： | NB3N3001 |
Semiconductor Components Industries, LLC, 2006
October, 2006 Rev. 1
1
Publication Order Number:
NB3N3001/D
NB3N3001
3.3 V 106.25 MHz/ 212.5 MHz
PureEdge Clock Generator with
LVPECL Differential Output
Description
The NB3N3001 is a lowjitter, dualrate PLLsynthesized clock
generator. It accepts a standard 26.5625 MHz fundamental mode AT cut
parallel resonant crystal as the reference source for its integrated crystal
oscillator and low noise phaselocked loop (PLL) and produces user
selectable clock frequencies of either 106.25 MHz or 212.5 MHz.
In addition, the PLL circuitry will generate a 50% duty cycle
squarewave through a pair of differential LVPECL clock outputs.
Typical phase jitter at 106.25 MHz is 0.3 ps RMS from 637 kHz to
10 MHz.
The LVPECL output drivers can be disabled to high impedance with
the OE pin set LOW. The NB3N3001 operates from a single +3.3 V
supply, and is available in both plastic package and die form. The
operating temperature range is from 40
°
C to +85
°
C.
The NB3N3001 device provides the optimum combination of low
cost, flexibility, and high performance which makes it ideal for
FibreChannel applications.
Features
PureEdge Clock Family Provides Accuracy and Precision
Selectable Output Frequency of 106.25 MHz or 212.5 MHz
Crystal Oscillator Interface Designed for a 26.5625 MHz Crystal
Fully Integrated PhaseLockLoop with Internal Loop Filter
Differential 3.3 V LVPECL Outputs
Exceeds Bellcore and ITU Jitter Generation Specification
RMS Phase Jitter @ 106.25 MHz, using a 26.5625 MHz Crystal
(637 kHz 10 MHz): 0.3 ps (Typical)
RMS Phase Noise at 106.25 MHz
Phase Noise:
Offset
Noise Power
100 Hz 108 dBc/Hz
1 kHz
122 dBc/Hz
10 kHz 135 dBc/Hz
100 kHz135 dBc/Hz
Operating Range: V
CC
= 3.135 V to 3.465 V
40
°
C to +85
°
C Ambient Operating Temperature
Small Footprint 8pin TSSOP Package
This is a PbFree Device
Figure 1. Logic Diagram
Phase
Detector
Charge
Pump
N =
or
8
4
M =
32
Crystal
Oscillator
Q
Q
X
IN
X
OUT
VCO
850 MHz
26.5625 MHz
LVPECL
Output
212.5 MHz
or
106.25 MHz
FSEL
MARKING
DIAGRAM
A
Y
WW = Work Week
= PbFree Package
= Assembly Location
= Year
TSSOP8
DT SUFFIX
CASE 948S
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
301
YWW
A
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| NB3N3001DTG | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 XTAL LVPECL FIBR CLK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| NB3N3001DTR2G | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 XTAL LVPECL FIBR CLK RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| NB3N3002 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V, Crystal-to-HCSL Clock Generator |
| NB3N3002DTG | 功能描述:鎖相環(huán) - PLL CLK GEN LVPECL DIFF OUT RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| NB3N3002DTR2G | 功能描述:鎖相環(huán) - PLL CLK GEN LVPECL DIFF OUT RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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