參數(shù)資料
型號(hào)： NAND128W4A2CZA6E
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 8M X 16 FLASH 3V PROM, 35 ns, PBGA55
封裝： 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, VFBGA-55
文件頁數(shù)： 50/56頁
文件大?。?/td> 1209K
代理商： NAND128W4A2CZA6E
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
54/56
REVISION HISTORY
Table 27. Document Revision History
Date
Version
Revision Details
06-Jun-2003
1.0
First Issue
07-Aug-2003
2.0
Design Phase
27-Oct-2003
3.0
Engineering Phase
03-Dec-2003
4.0
Document promoted from Target Specification to Preliminary Data status.
VCC changed to VDD and ICC to IDD.
Title of Table 2.. changed to “Product Description” and Page Program Typical Timing
for NANDXXXR3A devices corrected. Table 1., Product List, inserted on page 2.
13-Apr-2004
5.0
WSOP48 and VFBGA55 packages added, VFBGA63 (9 x 11 x 1mm) removed.
Figure 19., Cache Program Operation, modified and note 2 modified. Note removed
Meaning of tBLBH4 modified, partly replaced by tWHBH1 and tWHRL min for 3V devices
References removed from RELATED DOCUMENTATION section and reference
made to ST Website instead.
Note 3 to Table 7., Address Insertion, x16 Devices removed. Only 00h Pointer
operations are valid before a Cache Program operation. IDD4 removed from Table
Waveform. Small text changes.
28-May-2004
6.0
TFBGA55 package added (mechanical data to be announced). 512Mb Dual Die
devices added. Figure 19., Cache Program Operation modified.
Package code changed for TFBGA63 8.5 x 15 x 1.2mm, 6x8 ball array, 0.8mm pitch
(1Gbit Dual Die devices) in Table 26., Ordering Information Scheme.
02-Jul-2004
7.0
Cache Program removed from document. TFBGA55 package specifications added
(Figure 40., TFBGA55 8 x 10mm - 6x8 active ball array - 0.80mm pitch, Package
Outline and Table 25., TFBGA55 8 x 10mm - 6x8 active ball array - 0.80mm pitch,
Package Mechanical Data).
Test
conditions
modified
for
VOL and VOH parameters in Table 19., DC
01-Oct-2004
8.0
Third part number corrected in Table 1., Product List. 512 Mbit Dual Die information
modified. Definition of a Bad Block modified in Bad Block Management paragraph.
Diagram modified.
Document promoted from Preliminary Data to Full Datasheet status.
03-Dec-2004
9.0
Automatic Page 0 Read at Power-Up option no longer available.
PC Demo board with simulation software removed from list of available development
tools. Chip Enable (E) paragraph clarified.
13-Dec-2004
10.0
Description of the family clarified in the SUMMARY DESCRIPTION section.
25-Feb-2005
11.0
WSOP48 replaced with USOP48 package,
VFBGA63 (8.5 x 15 x 1mm) replaced with VFBGA63 (9 x 11 x 1mm) package,
TFBGA63 (8.5 x 15 x 1mm) replaced with TFBGA63 (9 x 11 x 1.2mm) package.
相關(guān)PDF資料
PDF描述
NAND128R4A2BZA6E 8M X 16 FLASH 1.8V PROM, 35 ns, PBGA55
NAND256R4A0DN6T 16M X 16 FLASH 1.8V PROM, 15000 ns, PDSO48
NAND256R4A2DZA1F 16M X 16 FLASH 1.8V PROM, 15000 ns, PBGA63
NAND256W3A1BZA1E 32M X 8 FLASH 3V PROM, 12000 ns, PBGA63
NAND256W3A1DN1F 32M X 8 FLASH 3V PROM, 12000 ns, PDSO48
相關(guān)代理商/技術(shù)參數(shù)
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NAND16GAHAPZO6E 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Trays
NAND16GW3B6DPA6E 功能描述:IC FLASH 16GBIT 114LFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:576 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:閃存 - NAND 存儲(chǔ)容量:512M（64M x 8） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 其它名稱:497-5040
NAND16GW3B6DPA6F 功能描述:IC FLASH 16GBIT 114LFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:576 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:閃存 - NAND 存儲(chǔ)容量:512M（64M x 8） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 其它名稱:497-5040
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