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參數(shù)資料
| 型號(hào)： | MX29F1611 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 16M-BIT [2M x 8/1M x 16] CMOS SINGLE VOLTAGE PAGEMODE FLASH EEPROM |
| 中文描述： | 1,600位[2米x 8/1M × 16] CMOS單電壓閃存EEPROM PAGEMODE |
| 文件頁數(shù)： | 9/36頁 |
| 文件大小： | 171K |
| 代理商： | MX29F1611 |
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9
P/N: PM0440
REV. 1.6, JUL. 16, 1998
MX29F1611
The read or reset operation is initiated by writing the read/
reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the
memory. The device remains enabled for reads until the
CIR contents are altered by a valid command sequence.
The device will automatically power-up in the read/reset
state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will
retrieve array data. This default value ensures that no
spurious alteration of the memory content occurs during
the power transition. Refer to the AC Read
Characteristics and Waveforms for the specific timing
parameters.
The MX29F1611 is accessed like an EPROM. When CE
and OE are low and WE is high the data stored at the
memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high
impedance state whenever CE or OE is high. This dual
line control gives designers flexibility in preventing bus
contention.
Note that the read/reset command is not valid when
program or erase is in progress.
READ/RESET COMMAND
Any attempt to write to the device without the three-cycle
command sequence will not start the internal Write State
Machine(WSM), no data will be written to the device.
After three-cycle command sequence is given, a
byte(word) load is performed by applying a low pulse on
the WE or CE input with CE or WE low (respectively) and
OE high. The address is latched on the falling edge of CE
or WE, whichever occurs last. The data is latched by the
first rising edge of CE or WE. Maximum of 128 bytes of
data may be loaded into each page by the same
procedure as outlined in the page program section below.
Byte(word) loads are used to enter the 128 bytes(64
words) of a page to be programmed or the software codes
for data protection. A byte load(word load) is performed
by applying a low pulse on the WE or CE input with CE or
WE low (respectively) and OE high. The address is
latched on the falling edge of CE or WE, whichever occurs
last. The data is latched by the first rising edge of CE or
WE.
Either byte-wide load or word-wide load is
determined(Byte = VIL or VIH is latched) on the falling
edge of the WE(or CE) during the 3rd command write
cycle.
BYTE-WIDE LOAD/WORD-WIDE LOAD
PROGRAM
Any page to be programmed should have the page in the
erased state first, i.e. performing sector erase is
suggested before page programming can be performed.
The device is programmed on a page basis. If a
byte(word) of data within a page is to be changed, data for
the entire page can be loaded into the device. Any
byte(word) that is not loaded during the programming of
its page will be still in the erased state (i.e. FFH). Once
the bytes of a page are loaded into the device, they are
simultaneously programmed during the internal
programming period. After the first data byte(word) has
been loaded into the device, successive bytes(words)
are entered in the same manner. Each new byte(word)
to be programmed must have its high to low transition on
WE (or CE) within 30us of the low to high transition of WE
(or CE) of the preceding byte(word). A6 to A19 specify
the page address, i.e., the device is page-aligned on 128
PAGE READ
The MX29F1611 offers fast page mode read feature. The
users can take the access time advantage if keeping CE,
OE at low and the same page address (A3~A19
unchanged). Please refer to Figure 5-2 for detailed timing
waveform. The system performance could be enhanced
by initiating 1 normal read and 7 fast page reads(for word
mode A0~A2) or 15 fast page reads(for byte mode
altering A-1~A2).
PAGE PROGRAM
To initiate Page program mode, a three-cycle command
sequence is required. There are two " unlock" write
cycles. These are followed by writing the page program
command-A0H.
INDEX
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MX29LV017AXEC-90 | 16M-BIT [2Mx8] CMOS SINGLE VOLTAGE |
| MX29LV017ATI-70 | 16M-BIT [2Mx8] CMOS SINGLE VOLTAGE |
| MX29LV017ATI-90 | 16M-BIT [2Mx8] CMOS SINGLE VOLTAGE |
| MX29LV017AXBC-70 | 16M-BIT [2Mx8] CMOS SINGLE VOLTAGE |
| MX29LV017AXBC-90 | 16M-BIT [2Mx8] CMOS SINGLE VOLTAGE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX29F1615 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| MX29F200BMC-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMC-55 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMC-70 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
| MX29F200BMC-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
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