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參數(shù)資料
| 型號： | MT90823 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | 3V Large Digital Switch(3V 大數(shù)字開關(guān)) |
| 中文描述： | 3V的大型數(shù)字交換機（3V的大數(shù)字開關(guān)） |
| 文件頁數(shù)： | 21/37頁 |
| 文件大?。?/td> | 162K |
| 代理商： | MT90823 |
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CMOS
MT90823
21
Figure 6 - Switch Matrix with Serial Stream at Various Bit Rates
Figure 7 - Serial Input Frame Alignment Evaluation for Various Frame Pulses
16 Streams
IN
16 Streams
OUT
16 Streams
16 Streams
MT90823
#1
MT90823
#2
MT90823
#3
MT90823
#4
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
1,024 - Channel Switch
2,048 - Channel Switch
4,096 - Channel Switch
Bit Rate
(IN/OUT)
Size of
Switch Matrix
STi0
STi1
STi2
STo[0:15]
STi15
Frame Alignment
Evaluation circuit
Central
Timing Source
FE
input
CLK
FP
FP STi15
FP STi0
FP STi1
FP STi2
External
Mux
MT90823
Note:
1. Use the external mux to select one of the serial frame pulses.
2. To start a measurement cycle, set the Start Frame Evaluation (SFE) bit in the IMS register low for at least 1 frame.
3. Frame evaluation starts when the SFE bit is changed from low to high.
4. Two frames later, the Complete Frame Evaluation (CFE) bit of the Frame Alignment Register (FAR) changes from low to
high to signal the CPU that a valid offset measurement is ready to be read from bit [11:0] of the FAR register.
5. The SFE bit must be set to zero before a new measurement cycle started.
Applications
Switch Matrix Architectures
The MT90823 is an ideal device for medium to large
size switch matrices where voice and grouped data
channels are transported within the same frame. In
such applications, the voice samples have to be time
interchanged with a minimum delay while maintain-
ing the integrity of grouped data. To ensure the
integrity of grouped data during switching and to
provide a minimum delay for voice connections, the
MT90823 provides per-channel selection between
variable and constant throughput delay. This can be
selected by the V/C bit of the Connection Memory.
Figure 6 illustrates how four MT90823 devices can
be used to form non-blocking switches for up to 4096
channels with data rate of 8.192 Mb/s.
Serial Input Frame Alignment Evaluation
The MT90823 is capable of performing frame
alignment evaluation. The frame pulse under
evaluation is connected to the FE (frame measure-
ment) pin. An external multiplexer is required to
select one of the frame pulses related to the different
input streams. The block diagram at Figure 7 shows
a switch matrix that performs frame alignment
evaluation for 16 frame pulses.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90823AB | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 100LQFP - Trays 制造商:Microsemi Corporation 功能描述:3V LARGE DIGITAL SWITCH |
| MT90823AB1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 100LQFP - Trays 制造商:Microsemi Corporation 功能描述:3V LARGE DIGITAL SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH 2048X2048 100LQFP 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH 2048X2048 100LQFP |
| MT90823AG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 120BGA - Trays |
| MT90823AG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 120BGA - Trays |
| MT90823AL | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 100MQFP - Trays |
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