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參數(shù)資料
| 型號： | MT90823 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | 3V Large Digital Switch(3V 大數(shù)字開關(guān)) |
| 中文描述： | 3V的大型數(shù)字交換機（3V的大數(shù)字開關(guān)） |
| 文件頁數(shù)： | 12/37頁 |
| 文件大小： | 162K |
| 代理商： | MT90823 |
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12
MT90823
CMOS
Bit V/C (Variable/Constant Delay) of each connection
memory location allows the per-channel selection
between variable and constant throughput delay
modes.
The loopback bit should be used for diagnostic
purpose only; this bit should be set to zero for normal
operation. If all LPBK bits are set high for all
connection memory locations, the associated
ST-BUS output channel data is internally looped
back to the ST-BUS input channel (i.e., SToN
channel m data loops back to STi N channel m).
If the LPBK bit is low, the loopback feature is
disabled. For proper per-channel loopback operation,
the contents of the frame delay offset registers must
be set to zero.
Table 4 - Internal Register and Address Memory Mapping
Table 5 - Output High Impedance Control
A7
(Note 1)
A6
A5
A4
A3
A2
A1
A0
Location
0
0
0
0
0
0
0
0
Control Register, CR
0
0
0
0
0
0
0
1
Interface Mode Selection Register, IMS
0
0
0
0
0
0
1
0
Frame Alignment Register, FAR
0
0
0
0
0
0
1
1
Frame Input Offset Register 0, FOR0
0
0
0
0
0
1
0
0
Frame Input Offset Register 1, FOR1
0
0
0
0
0
1
0
1
Frame Input Offset Register 2, FOR2
0
0
0
0
0
1
1
0
Frame Input Offset Register 3, FOR3
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
.
1
1
0
0
.
1
1
0
0
.
1
1
0
0
.
1
1
0
1
.
0
1
Ch 0
Ch 1
.
Ch 30
Ch 31 (Note 2)
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
.
1
1
0
0
.
1
1
0
0
.
1
1
0
0
.
1
1
0
1
.
0
1
Ch 32
Ch 33
.
Ch 62
Ch 63 (Note 3)
1
1
1
1
1
1
1
1
1
1
0
0
.
1
1
0
0
.
1
1
0
0
.
1
1
0
0
.
1
1
0
0
.
1
1
0
1
.
0
1
Ch 64
Ch 65
.
Ch 126
Ch 127 (Note 4)
Notes:
1. Bit A7 must be high for access to data and connection memory positions. Bit A7 must be low for access to registers.
2. Channels 0 to 31 are used when serial interface is at 2Mb/s mode.
3. Channels 0 to 63 are used when serial interface is at 4Mb/s mode.
4. Channels 0 to 127 are used when serial interface is at 8Mb/s mode.
OE bit in Connection
Memory
ODE pin
OSB bit in IMS register
ST-BUS Output Driver Status
0
Don’t Care
Don’t Care
Per Channel
High Impedance
1
0
0
High Impedance
1
0
1
Enable
1
1
Don’t care
Enable
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90823AB | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 100LQFP - Trays 制造商:Microsemi Corporation 功能描述:3V LARGE DIGITAL SWITCH |
| MT90823AB1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 100LQFP - Trays 制造商:Microsemi Corporation 功能描述:3V LARGE DIGITAL SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH 2048X2048 100LQFP 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH 2048X2048 100LQFP |
| MT90823AG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 120BGA - Trays |
| MT90823AG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 120BGA - Trays |
| MT90823AL | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 100MQFP - Trays |
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