參數(shù)資料
型號: MT90823
廠商: Mitel Networks Corporation
英文描述: 3V Large Digital Switch(3V 大數(shù)字開關(guān))
中文描述: 3V的大型數(shù)字交換機(jī)(3V的大數(shù)字開關(guān))
文件頁數(shù): 13/37頁
文件大?。?/td> 162K
代理商: MT90823
CMOS
MT90823
13
Initialization of the MT90823
During power up, the TRST pin should be pulsed low,
or held low continuously, to ensure that the MT90863
is in the normal functional mode. A 5K pull-down
resistor can be connected to this pin so that the
device will not enter the JTAG test mode during
power up.
Upon power up, the contents of the connection
memory can be in any state and the ODE pin should
be held low to keep all ST-BUS outputs in a high
impedance state until the microprocessor has
initialized the switching matrix.
To prevent two ST-BUS outputs from driving the
same stream simultaneously, the microprocessor
should program the desired active paths through the
switch and put all other channels into a high
impedance state during the initialization routine by
using the block programming mode. In addition, the
loopback bits in the connection memory should be
cleared for normal operation.
When this process is complete, the microprocessor
controlling the matrices can bring the ODE pin or
OSB bit high to relinquish the high impedance state
control to the OE bit in the connection memory.
Table 6 - Control (CR) Register Bits
Table 7 - Valid Address lines for Different Bit Rates
Bit
Name
Description
15 - 6
Unused
Must be zero for normal operation.
5
MBP
Memory Block Program.
When 1, the connection memory block programming
feature is ready for the programming of Connection Memory high bits, bit 11 to bit 15.
When 0, this feature is disabled.
4
MS
Memory Select.
When 0, connection memory is selected for read or write operations.
When 1, the data memory is selected for read operations and connection memory is
selected for write operations. (No microprocessor write operation is allowed for the
data memory.)
3 - 0
STA3-0
Stream Address Bits
. The binary value expressed by these bits refers to the input or
output data stream, which corresponds to the subsection of memory made accessible
for subsequent operations. (STA3 = MSB, STA0 = LSB)
Input/Output
Data Rate
Valid Address Lines
2.048 Mb/s
A4, A3, A2, A1, A0
4.096 Mb/s
A5, A4, A3, A2, A1, A0
8.192 Mb/s
A6, A5, A4 A3, A2, A1, A0
Read/Write Address:
Reset Value:
00
H
,
0000
H
.
7
6
5
4
3
2
1
0
8
9
10
11
12
13
STA0
STA1
STA2
STA3
14
15
MS
MBP
0
0
0
0
0
0
0
0
0
0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MT90823AG 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 120BGA - Trays
MT90823AG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 120BGA - Trays
MT90823AL 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K/1K X 1K/512 X 512 3.3V 100MQFP - Trays