參數(shù)資料
型號(hào)： MT9045
廠商： Mitel Networks Corporation
英文描述： T1/E1/OC3 System Synchronizer(T1/E1/OC3 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）)
中文描述： T1/E1/OC3系統(tǒng)同步器（T1/E1/OC3系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成））
文件頁(yè)數(shù)： 1/25頁(yè)
文件大?。?/td> 104K
代理商： MT9045
1
MT9045
T1/E1/OC3 System Synchronizer
Advance Information
Features
Supports AT&T TR62411 and Bellcore GR-
1244-CORE Stratum 3, Stratum 4 Enhanced
and Stratum 4 timing for DS1 interfaces
Supports ITU-T G.813 Option 1 clocks for 2048
kbit/s interfaces
Supports ITU-T G.812 Type IV clocks for 1,544
kbit/s interfaces and 2,048 kbit/s interfaces
Supports ETSI ETS 300 011, TBR 4, TBR 12
and TBR 13 timing for E1 interfaces
Selectable 19.44 MHz, 1.544MHz, 2.048MHz or
8kHz input reference signals
Provides C1.5, C2, C4, C6, C8, C16, and C19
(STS-3/OC3 clock divided by 8) output clock
signals
Provides 5 styles of 8 KHz framing pulses
Holdover frequency accuracy of 0.05 PPM
Holdover indication
Attenuates wander from 1.9Hz
Fast lock mode
Provides Time Interval Error (TIE) correction
Accepts reference inputs from two independent
sources
JTAG Boundary Scan
Applications
Synchronization and timing control for
multitrunk T1,E1 and STS-3/OC3 systems
ST-BUS clock and frame pulse sources
Description
The
contains a digital phase-locked loop (DPLL), which
provides timing and synchronization signals for
multitrunk T1 and E1 primary rate transmission links
and STS-3/OC3 links.
MT9045
T1/E1/OC3
System
Synchronizer
The MT9045 generates ST-BUS clock and framing
signals that are phase locked to either a 19.44 MHz,
2.048MHz, 1.544MHz, or 8kHz input reference.
The MT9045 is compliant with AT&T TR62411 and
Bellcore GR-1244-CORE Stratum 3, Stratum 4
Enhanced, and Stratum 4 and ETSI ETS 300 011;
and ITU-T G.813 Option 1 for 2048 kbit/s interfaces.
It will meet the jitter/wander tolerance, jitter/wander
transfer, intrinsic jitter/wander, frequency accuracy,
capture
range,
phase
frequency
and
MTIE
specifications.
change
requirements
slope,
holdover
for
these
Figure 1 - Functional Block Diagram
IEEE
1149.1a
Reference
Select
Feedback
TIE
Corrector
Enable
Control State Machine
State
Select
State
Select
Frequency
Select
MUX
Input
Impairment
Monitor
Output
Interface
Circuit
Reference
Select
MUX
TIE
Corrector
Circuit
MS1 MS2
FS1
FS2
TCK
TDI
TMS
TRST
SEC
RST
RSEL
VDD
VSS
TCLR
C1.5o
C2o
C4o
C6o
C19o
C8o
C16o
F0o
F8o
F16o
RSP
TSP
OSCo
OSCi
Master Clock
TDO
PRI
HOLDOVER
P FLOCK
LOCK
Reference
Monitor
Prioor
Secoor
Virtual
Reference
Selected
Reference
DPLL
DS5270
ISSUE 4
January 2001
Ordering Information
MT9045AN
48 Pin SSOP
-40 to +85
°
C
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT9045AN 制造商:Microsemi Corporation 功能描述:
MT9045AN1 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Rail/Tube 制造商:Microsemi Corporation 功能描述:T1/E1/OC3 SYSTEM SYNCHRONIZER
MT9045ANR1 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Tape and Reel 制造商:Microsemi Corporation 功能描述:iB FREE T1/E1/OC3 SYSTEM SYNCHRONIZER 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Tape and Reel
MT9046 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL
MT9046AN 制造商:Microsemi Corporation 功能描述:
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