參數(shù)資料
型號(hào)： MT9044AP
廠商： Mitel Networks Corporation
英文描述： T1/E1/OC3 System Synchronizer
中文描述： T1/E1/OC3系統(tǒng)同步
文件頁數(shù)： 2/30頁
文件大?。?/td> 120K
代理商： MT9044AP
MT9044
Advance Information
2
Figure 2 - Pin Connections
Pin Description
Pin #
PLCC
Pin #
MQFP
Name
Description
1,10,
23,31
39,4,17
,25
V
SS
Ground.
0 Volts.
2
40
TCK
Test Clock (TTL Input):
Provides the clock to the JTAG test logic. This pin is
internally pulled up to V
DD
.
TIE Circuit Reset (TTL Input):
A logic low at this input resets the Time Interval
Error (TIE) correction circuit resulting in a re-alignment of input phase with output
phase as shown in Figure 19. The TCLR pin should be held low for a minimum of
300ns. This pin is internally pulled down to VSS.
3
41
TCLR
4
42
TRST
Test Reset (TTL Input):
Asynchronously initializes the JTAG TAP controller by
putting it in the Test-Logic-Reset state. This pin is internally pulled down to VSS.
5
43
SEC
Secondary Reference (TTL Input).
This is one of two (PRI & SEC) input
reference sources (falling edge) used for synchronization. One of three possible
frequencies (8kHz, 1.544MHzMHz, or 2.048MHz) may be used. The selection of
the input reference is based upon the MS1, MS2, LOS1, LOS2, RSEL, and GTi
control inputs (Automatic or Manual). This pin is internally pulled up to V
DD
.
Primary Reference (TTL Input).
See pin description for SEC. This pin is
internally pulled up to V
DD
.
Positive Supply Voltage.
+5V
DC
nominal.
Oscillator Master Clock (CMOS Output).
For crystal operation, a 20MHz crystal
is connected from this pin to OSCi, see Figure 10. For clock oscillator operation,
this pin is left unconnected, see Figure 9.
6
44
PRI
7,28
1,22
V
DD
OSCo
8
2
9
3
OSCi
Oscillator Master Clock (CMOS Input).
For crystal operation, a 20MHz crystal is
connected from this pin to OSCo, see Figure 10. For clock oscillator operation, this
pin is connected to a clock source, see Figure 9.
11
5
F16o
Frame Pulse ST-BUS 8.192 Mb/s (CMOS Output).
This is an 8kHz 61ns active
low framing pulse, which marks the beginning of an ST-BUS frame. This is typically
used for ST-BUS operation at 8.192 Mb/s. See Figure 20.
1
8
9
7
4 3
10
11
12
13
14
15
16
17
37
36
33
32
31
30
29
34
35
38
39
40
41
42
V
T
S
P
VDD
OSCo
OSCi
VSS
F16o
RSP
F0o
TSP
F8o
C1.5o
AVDD
GTi
HOLDOVER
GTo
VSS
LOS2
LOS1
MS2
TDO
MS1
RSEL
F
F
R
18 19 20 21 22 23 24
A
V
C
C
C
C
MT9044
2
5
6
43
44
25 26 27 28
T
T
T
T
TEST
C
C
A
V
C
39
2
3
4
5
6
7
8
9
1
42 41
31
30
27
26
25
24
23
28
29
32
33
34
35
36
V
T
S
P
VDD
OSCo
OSCi
VSS
F16o
RSP
F0o
TSP
F8o
C1.5o
AVDD
GTi
HOLDOVER
GTo
VSS
LOS2
LOS1
MS2
TDO
MS1
RSEL
F
F
R
12 13 14 15 16 17 18
A
V
C
C
C
C
MT9044AL
40
43
44
37
38
19 20 21 22
10
11
T
T
T
T
TEST
C
C
A
V
C
相關(guān)PDF資料
PDF描述
MT9045 T1/E1/OC3 System Synchronizer(T1/E1/OC3 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT9044AP1 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 5V 44PLCC - Rail/Tube 制造商:Microsemi Corporation 功能描述:T1/E1/OC3 SYSTEM SYNCHRONIZER 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SYNCHRONIZER T1/E1 44PLCC 制造商:Microsemi Corporation 功能描述:IC SYNCHRONIZER T1/E1 44PLCC
MT9044APR1 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 5V 44PLCC - Tape and Reel 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/OC3/T1 5V 44PLCC - Tape and Reel
MT9045 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/OC3 System Synchronizer
MT9045AN 制造商:Microsemi Corporation 功能描述:
MT9045AN1 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Rail/Tube 制造商:Microsemi Corporation 功能描述:T1/E1/OC3 SYSTEM SYNCHRONIZER
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