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參數(shù)資料
| 型號： | MT55L256V36F |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 8Mb: 256K x 36，F(xiàn)low-Through ZBT SRAM(8Mb流通式同步靜態(tài)存儲器) |
| 中文描述： | 8MB的：256K × 36，流量通過ZBT SRAM的（8兆流通式同步靜態(tài)存儲器） |
| 文件頁數(shù)： | 17/25頁 |
| 文件大?。?/td> | 380K |
| 代理商： | MT55L256V36F |
17
8Mb: 512K x 18, 256K x 32/36 Flow-Through ZBT SRAM
MT55L512L18F_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
8Mb: 512K x 18, 256K x 32/36
FLOW-THROUGH ZBT SRAM
I
DD
OPERATING CONDITIONS AND MAXIMUM LIMITS
(Note 1) (0°C
￡
T
A
￡
+70°C; V
DD
= +3.3V ±0.165V unless otherwise noted)
DESCRIPTION
Power Supply
Current: Operating
CONDITIONS
SYMBOL
TYP
-10
-11
-12
UNITS
NOTES
Device selected; All inputs
￡
V
IL
or
3
V
IH
; Cycle time
3
t
KC (MIN);
V
DD
= MAX; Outputs open
Device selected; V
DD
= MAX;
CKE#
3
V
IH
;
All inputs
￡
V
SS
+ 0.2 or
3
V
DD
- 0.2;
Cycle time
3
t
KC (MIN)
Device deselected; V
DD
= MAX;
All inputs
￡
V
SS
+ 0.2 or
3
V
DD
- 0.2;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
All inputs
￡
V
IL
or
3
V
IH
;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
ADV/LD#
3
V
IH
; All inputs
￡
V
SS
+ 0.2
or
3
V
DD
- 0.2; Cycle time
3
t
KC (MIN)
ZZ
3
V
IH
I
DD
165
300
275
250
mA
2, 3, 4
Power Supply
Current: Idle
I
DD
1
10
28
22
20
mA
2, 3, 4
CMOS Standby
I
SB
2
0.5
10
10
10
mA
3, 4
TTL Standby
I
SB
3
6
25
25
25
mA
3, 4
Clock Running
I
SB
4
37
65
65
60
mA
3, 4
Snooze Mode
I
SB
2
Z
0.5
10
10
10
mA
4
MAX
NOTE:
1. V
DD
Q = +3.3V ±0.165V for 3.3V I/O configuration; V
DD
Q = +2.5V +0.4V/-0.125V for 2.5V I/O configuration.
2. I
DD
is specified with no output current and increases with faster cycle times. I
DD
Q increases with faster cycle times and
greater output loading.
3. “ Device deselected” means device is in a deselected cycle as defined in the truth table. “ Device selected” means device
is active (not in deselected mode).
4. Typical values are measured at +3.3V, +25°C and 12ns cycle time.
5. This parameter is sampled.
TQFP THERMAL RESISTANCE
DESCRIPTION
Thermal Resistance
(Junction to Ambient)
CONDITIONS
SYMBOL
q
JA
TYP
40
UNITS NOTES
°C/W
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51.
5
Thermal Resistance
(Junction to Top of Case)
q
JC
8
°C/W
5
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相關代理商/技術參數(shù) |
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