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參數(shù)資料
| 型號： | MSC1202Y3RHHT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC36 |
| 封裝： | GREEN, PLASTIC, QFN-36 |
| 文件頁數(shù)： | 33/93頁 |
| 文件大?。?/td> | 1093K |
| 代理商： | MSC1202Y3RHHT |
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MSC1200
MSC1201
MSC1202
SBAS317E APRIL 2004 REVISED MAY 2006
www.ti.com
39
Hardware Configuration Register 0 (HCR0)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CADDR 3Fh
EPMA
PML
RSL
EBR
EWDR
1
DFSEL1
DFSEL0
NOTE: HCR0 is programmable only in SFPM, but can be read in UAM using the faddr_data_read Boot ROM routine.
EPMA
Enable Program Memory Access (Security Bit).
bit 7
0: After reset in programming modes, Flash Memory can only be accessed in UAM until a mass erase is done.
1: Fully Accessible (default)
PML
Program Memory Lock (PML has priority over RSL).
bit 6
0: Enable read and write for Program Memory in UAM.
1: Enable Read-Only mode for Program Memory in UAM (default).
RSL
Reset Sector Lock. The reset sector can be used to provide another method of Flash Memory programming, which
bit 5
allows Program Memory updates without changing the jumpers for in-circuit code updates or program development.
The code in this boot sector would then provide the monitor and programming routines with the ability to jump into
the main Flash code when programming is finished.
0: Enable Reset Sector Writing
1: Enable Read-Only mode for reset sector (4kB) (default). Same effect as PML for the MSC120xY2.
EBR
Enable Boot ROM. Boot ROM is 1kB of code located in ROM, not to be confused with the 4kB Boot Sector located
bit 4
in Flash Memory.
0: Disable Internal Boot ROM
1: Enable Internal Boot ROM (default)
EWDR
Enable Watchdog Reset.
bit 3
0: Disable Watchdog Reset
1: Enable Watchdog Reset (default)
DFSEL10
Data Flash Memory Size (see Table 3).
bits 10
00: 4kB Data Flash Memory (MSC120xY3 only)
01: 2kB Data Flash Memory
10: 1kB Data Flash Memory
11: No Data Flash Memory (default)
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