
NXP Semiconductors
MPT612
Maximum power point tracking IC
The MPT612 can count external events on one of the capture inputs, if the minimum
external pulse width is equal to or longer than a period of PCLK. In this configuration,
unused capture lines can be selected as regular timer capture inputs or used as external
interrupts. The event counter provides the following features:
A 32-bit timer/counter with a programmable 32-bit prescaler
External event counter or timer operation
Four 32-bit capture channels per timer/counter that can take timer value snapshot
when an input signal transitions. A capture event can optionally generate an interrupt
Four 32-bit match registers that allow:
Continuous operation with optional interrupt generation on match
Stop timer on match with optional interrupt generation
Reset timer on match with optional interrupt generation
Four external outputs per timer/counter corresponding to match registers with the
following capabilities:
Set LOW on match
Set HIGH on match
Toggle on match
Do nothing on match
7.14 General purpose 16-bit timers/external event counters
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock. Optionally interrupts can be generated or other actions
performed at specified timer values, based on the contents of four match registers. In
addition, three capture inputs can be used to trap the timer value when input signals
transition and optionally to generate an interrupt. Multiple pins can be selected to perform
a single capture or match function, providing an application with logical OR, AND and
‘broadcast’ functions.
The MPT612 can count external events on one of the capture inputs when the minimum
external pulse is equal to or longer than a PCLK period. In this configuration, unused
capture lines can be selected as regular timer capture inputs or used as external
interrupts. The Timer/Counter provides the following features:
One 16-bit Timer/Counter with a programmable 16-bit prescaler
External event counter or timer operation
Four 16-bit match registers that allow:
Continuous operation with optional interrupt generation on match
Stop timer on match with optional interrupt generation
Reset timer on match with optional interrupt generation
Four external outputs per timer/counter corresponding to match registers, with the
following capabilities:
Set LOW on match
Set HIGH on match
Toggle on match
Do nothing on match
MPT612
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NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 14 September 2010
14 of 14