參數(shù)資料
型號(hào)： MPE603RRX300LX
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 300 MHz, RISC PROCESSOR, CBGA255
封裝： CERAMIC, BGA-255
文件頁(yè)數(shù)： 23/28頁(yè)
文件大?。?/td> 208K
代理商： MPE603RRX300LX
4
EC603e Microprocessor Hardware Specifications (PID7t), Rev. 2.0
MOTOROLA
Integrated power management
Low-power 2.5/3.3-volt design
Internal processor/bus clock multiplier that provides 2/1, 2.5/1, 3/1, 3.5/1, 4/1, 4.5/1, 5/1,
5.5/1, and 6/1 ratios
Three power saving modes: doze, nap, and sleep
Automatic dynamic power reduction when internal functional units are idle
In-system testability and debugging features through JTAG boundary-scan capability
1.3 General Parameters
The following list provides a summary of the general parameters of the PID7t:
Technology
0.25 m CMOS, ve-layer metal
Die size
5.65 mm x 7.7 mm (44 mm2)
Transistor count
2.6 million
Logic design
Fully-static
Package
255 ceramic ball grid array (CBGA)
Core power supply
2.5 ± 5% V dc
I/O power supply
3.3 ± 5% V dc
1.4 Electrical and Thermal Characteristics
This section provides the AC and DC electrical specications and thermal characteristics for the PID7t.
1.4.1 DC Electrical Characteristics
The tables in this section describe the PID7t DC electrical characteristics. Table 1 provides the absolute
maximum ratings.
Table 1. Absolute Maximum Ratings
Characteristic
Symbol
Value
Unit
Core supply voltage
Vdd
0.3 to 2.75
V
PLL supply voltage
AVdd
0.3 to 2.75
V
I/O supply voltage
OVdd
0.3 to 3.6
V
Input voltage
Vin
0.3 to 5.5
V
Storage temperature range
Tstg
55 to 150
C
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress
ratings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed may
affect device reliability or cause permanent damage to the device.
2. Caution: Vin must not exceed OVdd by more than 2.5 V at any time, including during power-on reset.
3. Caution: OVdd must not exceed Vdd/AVdd by more than 1.2 V at any time, including during power-on reset.
4. Caution: Vdd/AVdd must not exceed OVdd by more than 0.4 V at any time, including during power-on reset.
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