參數(shù)資料
型號： mPD705101GM-100-8ED
廠商： NEC Corp.
英文描述： V831TM 32-BIT MICROPROCESSOR
中文描述： V831TM 32位微處理器
文件頁數(shù)： 13/72頁
文件大?。?/td> 302K
代理商： MPD705101GM-100-8ED
μ
PD705101
13
5. BUS CONTROL FUNCTION
The features of the bus control function are as follows:
Directly connects to EDO DRAM, Page-ROM, SRAM (ROM), or I/O
CAS access with 1 bus clock minimum
DRAM byte access control with four CAS signals
Wait control by READY signal
32-/16-bit bus width can be set every CS space
When the 16-bit memory or I/O are accessed by data bus, the external data bus width can be set by the data
bus width control register (DBC).
6. WAIT CONTROL FUNCTION
The features of the wait control function are as follows:
Controls 8 blocks in accordance with I/O and memory spaces
Linear address space of each block: 16M bytes
Bus cycle select function
Block 0
: EDO DRAM
Blocks 1 and 2
: SRAM (ROM)
Blocks 3 through 6
: I/O or SRAM (ROM) selectable
Block 7
: Page-ROM or SRAM (ROM) selectable
Data bus width select function
Data bus width selectable between 32 bits and 16 bits for each block
Wait control function
Block 0
: Can control EDO DRAM access timing
Blocks 1 through 4 and 7 : 0 to 7 wait states
Blocks 5 and 6
: 0 to 15 wait states
Idle state insertion function
0 to 3 states for each block (bus clock)
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