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參數(shù)資料
| 型號(hào)： | MPC9330 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 3.3V / 2.5V 1:6 LVCMOS PLL CLOCK GENERATOR |
| 中文描述： | 3.3 / 2.5V的1:6的LVCMOS PLL時(shí)鐘發(fā)生器 |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 225K |
| 代理商： | MPC9330 |
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MPC9330
MOTOROLA
TIMING SOLUTIONS
10
versus Dual Line Termination Waveforms” shows a step in
the waveform, this step is caused by the impedance
mismatch seen looking into the driver. The parallel
combination of the 36
series resistor plus the output
impedance does not match the parallel combination of the
line impedances. The voltage wave launched down the two
lines will equal:
VL = VS ( Z0
÷
(RS+R0 +Z0))
Z0 = 50
|| 50
RS = 36
|| 36
R0 = 14
VL = 3.0 ( 25
÷
(18+17+25)
= 1.31V
At the load end the voltage will double, due to the near
unity reflection coefficient, to 2.6V. It will then increment
towards the quiescent 3.0V in steps separated by one round
trip delay (in this case 4.0ns).
1. Final skew data pending specification.
3.0
Figure 5. Single versus Dual Waveforms
TIME (nS)
V
2.5
2.0
1.5
1.0
0.5
0
2
4
6
8
10
12
14
OutB
tD = 3.9386
OutA
tD = 3.8956
In
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines the
situation in Figure 6. “Optimized Dual Line Termination”
should be used. In this case the series terminating resistors
are reduced such that when the parallel combination is added
to the output buffer impedance the line impedance is perfectly
matched.
Figure 6. Optimized Dual Line Termination
14
MPC9330
OUTPUT
BUFFER
RS = 22
ZO = 50
RS = 22
ZO = 50
14
+ 22
22
= 50
50
25
= 25
Figure 7. CCLK MPC9330 AC test reference for Vcc = 3.3V and Vcc = 2.5V
Pulse
Generator
Z = 50
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC9330 DUT
VTT
VTT
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC9330AC | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 FSL 1-6 LVCMOS PLL Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9330ACR2 | 功能描述:IC PLL CLOCK GENERATOR 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| MPC9330FA | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 3.3V 200MHz Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9330FAR2 | 制造商:Integrated Device Technology Inc 功能描述:MPC9330FAR2 - Tape and Reel |
| MPC9331 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.3 V 1:6 LVCMOS PLL Clock Generator |
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