參數(shù)資料
    型號(hào): MPC8360ECVVAJDGA
    廠商: Freescale Semiconductor
    文件頁(yè)數(shù): 60/102頁(yè)
    文件大小: 0K
    描述: IC MPU POWERQUICC II PRO 740TBGA
    標(biāo)準(zhǔn)包裝: 21
    系列: MPC83xx
    處理器類型: 32-位 MPC83xx PowerQUICC II Pro
    速度: 533MHz
    電壓: 1.2V
    安裝類型: 表面貼裝
    封裝/外殼: 740-LBGA
    供應(yīng)商設(shè)備封裝: 740-TBGA(37.5x37.5)
    包裝: 托盤
    配用: MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM
    MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC
    MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
    60
    Freescale Semiconductor
    HDLC, BISYNC, Transparent, and Synchronous UART AC Timing Specifications
    This figure provides the AC test load.
    Figure 49. AC Test Load
    Outputs—Internal clock high impedance
    tHIKHOX
    -0.5
    5.5
    ns
    Outputs—External clock high impedance
    tHEKHOX
    18
    ns
    Inputs—Internal clock input setup time
    tHIIVKH
    8.5
    ns
    Inputs—External clock input setup time
    tHEIVKH
    4—
    ns
    Inputs—Internal clock input hold time
    tHIIXKH
    1.4
    ns
    Inputs—External clock input hold time
    tHEIXKH
    1—
    ns
    Notes:
    1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
    are measured at the pin.
    2. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
    inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tHIKHOX symbolizes the outputs
    internal timing (HI) for the time tserial memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
    Table 63. Synchronous UART AC Timing Specifications1
    Characteristic
    Symbol2
    Min
    Max
    Unit
    Outputs—Internal clock delay
    tUAIKHOV
    011.3
    ns
    Outputs—External clock delay
    tUAEKHOV
    114
    ns
    Outputs—Internal clock high impedance
    tUAIKHOX
    011
    ns
    Outputs—External clock high impedance
    tUAEKHOX
    114
    ns
    Inputs—Internal clock input setup time
    tUAIIVKH
    6—
    ns
    Inputs—External clock input setup time
    tUAEIVKH
    8—
    ns
    Inputs—Internal clock input hold time
    tUAIIXKH
    1—
    ns
    Inputs—External clock input hold time
    tUAEIXKH
    1—
    ns
    Notes:
    1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
    are measured at the pin.
    2. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
    inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tHIKHOX symbolizes the outputs
    internal timing (HI) for the time tserial memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
    Table 62. HDLC, BISYNC, and Transparent AC Timing Specifications1 (continued)
    Characteristic
    Symbol2
    Min
    Max
    Unit
    Output
    Z0 = 50 Ω
    OVDD/2
    RL = 50 Ω
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    MPC8360ECVVAJDHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
    MPC8360ECVVAJFGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
    MPC8360ECVVAJFHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
    MPC8360ECVVALDGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
    MPC8360ECVVALDHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications