參數(shù)資料
型號(hào)： MPC8360ECVVAJDGA
廠商： Freescale Semiconductor
文件頁數(shù)： 38/102頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC II PRO 740TBGA
標(biāo)準(zhǔn)包裝： 21
系列： MPC83xx
處理器類型： 32-位 MPC83xx PowerQUICC II Pro
速度： 533MHz
電壓： 1.2V
安裝類型： 表面貼裝
封裝/外殼： 740-LBGA
供應(yīng)商設(shè)備封裝： 740-TBGA（37.5x37.5）
包裝： 托盤
配用： MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM
MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
40
Freescale Semiconductor
Local Bus AC Electrical Specifications
This figure provides the AC test load for the local bus.
Figure 22. Local Bus C Test Load
Local bus clock to output valid
tLBKHOV
—3
ns
Local bus clock to output high impedance for LAD/LDP
tLBKHOZ
—4
ns
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tLBIXKH1 symbolizes local bus
timing (LB) for the input (I) to go invalid (X) with respect to the time the tLBK clock reference (K) goes high (H), in this case
for clock one (1). Also, tLBKHOX symbolizes local bus timing (LB) for the tLBK clock reference (K) to go high (H), with respect
to the output (O) going invalid (X) or output hold time.
2. All timings are in reference to falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or rising edge of
LCLK0 (for all other inputs).
3. All signals are measured from OVDD/2 of the rising/falling edge of LCLK0 to 0.4 × OVDD of the signal in question for 3.3-V
signaling levels.
4. Input timings are measured at the pin.
5. tLBOTOT1 should be used when RCWH[LALE] is not set and when the load on LALE output pin is at least 10 pF less than
the load on LAD output pins.
6. tLBOTOT2 should be used when RCWH[LALE] is set and when the load on LALE output pin is at least 10 pF less than the
load on LAD output pins.
7. tLBOTOT3 should be used when RCWH[LALE] is set and when the load on LALE output pin equals to the load on LAD output
pins.
8. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
9. DLL bypass mode is not recommended for use at frequencies above 66 MHz.
Table 41. Local Bus General Timing Parameters—DLL Bypass Mode9 (continued)
Parameter
Symbol1
Min
Max
Unit
Notes
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8360ECVVAJDHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360ECVVAJFGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360ECVVAJFHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360ECVVALDGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
MPC8360ECVVALDHA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
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