參數(shù)資料
型號(hào)： MPC5606SEMLU
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, MS-026BGA, LQFP-176
文件頁(yè)數(shù)： 79/104頁(yè)
文件大小： 1729K
代理商： MPC5606SEMLU
MPC560xS Microcontroller Data Sheet, Rev. 2
Preliminary—Subject to Change Without Notice
Electrical Characteristics
Freescale Semiconductor
76
3.18
Pad AC Specifications
TUEp
CC P Total unadjusted error8 for
precise channels
Without current injection
-2
0.6
2
LSB
T
With current injection
-3
3
TUEx
CC T Total unadjusted error8 for
extended channel
Without current injection
-3
3
LSB
T
With current injection
-4
4
1 V
DDA = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 105 °C, unless otherwise specified.
2 All values need to be confirmed during device validation.
3 Analog and digital V
SS must be common (to be tied together externally).
4 V
AINx may exceed VSSA and VDDA limits, remaining on absolute maximum ratings, but the results of the conversion
will be clamped respectively to 0x000 or 0x3FF
5 During the sample time the input capacitance C
S can be charged/discharged by the external source. The internal
resistance of the analog source must allow the capacitance to reach its final voltage level within tADC_S. After the
end of the sample time tADC_S, changes of the analog input voltage have no effect on the conversion result. Values
for the sample clock tADC_S depend on programming.
6 The maximum sample rate is 1million samples per second, provided the source impedance and current
limiter(>1Kohms) are calculated adequately.
- Filter capacitor at analog source output must meet the criteria Cf (filter capacitor) > 2048*Cs (sampling capacitor
which is 3 pF )
7 This parameter does not include the sample time t
ADC_S, but only the time for determining the digital result and the
time to load the result’s register with the conversion result.
8 Total Unadjusted Error: The maximum error that occurs without adjusting Offset and Gain errors. This error is a
combination of Offset, Gain and Integral Linearity errors.
Table 39. Pad AC specifications (5.0 V, PAD3V5V = 1)1
No.
Pad
Tswitchon1,2
(ns)
Rise/Fall2,3
(ns)
Frequency2
(MHz)
Current slew2
(mA/ns)
Load drive
(pF)
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
1
Slow
1.5
—30
6
—50—
—
4
0.04
—
2
25
1.5
—
30
9
—
100
—
2
0.04
—
2
50
1.5
—
30
12
—
125
—
2
0.04
—
2
100
1.5
—
30
16
—
150
—
2
0.04
—
2
200
2
Medium
1
—
15
3
—
10
—
40
2.5
—
7
25
1
—
15
5
—
20
—
20
2.5
—
7
50
1
—
15
9
—
40
—
13
2.5
—
8
100
1
—
15
12
—
70
—
7
2.5
—
8
200
Table 38. ADC Conversion Characteristics (continued)
Symbol
C
Parameter
Conditions1
Value2
Unit
Min
Typ
Max
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