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| 型號： | MPC5606SEMLU |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176 |
| 封裝： | 24 X 24 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, MS-026BGA, LQFP-176 |
| 文件頁數(shù)： | 35/104頁 |
| 文件大?。?/td> | 1729K |
| 代理商： | MPC5606SEMLU |
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MPC560xS Microcontroller Data Sheet, Rev. 2
Preliminary—Subject to Change Without Notice
Pinout and Signal Descriptions
Freescale Semiconductor
36
2.4.7
Signal Details
Table 7. Signal details
Signal
Peripheral
Description
ABS[0]
BAM
Alternate Boot Select. Gives an option to boot by downloading code
via CAN or LIN.
AN[0:15]
Analog-to-digital
conversion (ADC)
Inputs used to bring into the device sensor-based signals for A/D
conversion.
MA[0:2]
ADC
These three control bits are output to enable the selection for an
external Analog Mux for expansion channels.
FABM
Force Alternate Boot mode. Forces the device to boot from the
external bus (Can or LIN). If not asserted, the device boots up from
the lowest flash sector containing a valid boot signature.
DCU_DE
Display Control Unit
Indicates that valid pixels are present when high; otherwise low to
allow a subframe display for pixels.
DCU_HSYNC
Display Control Unit
Horizontal sync pulse for TFT-LCD display
DCU_PCLK
Display Control Unit
Output pixel clock for TFT-LCD display
DCU_R[0:7],
DCU_G[0:7],
DCU_B[0:7]
Display Control Unit
Red, green and blue color 8-bit Pixel values for TFT-LCD displays
DCU_TAG
Display Control Unit
High indicates certain pixels that can be called as tagged pixels, upon
which internal CRC has been calculated based on pixel values and
pixel position.
DCU_VSYNC
Display Control Unit
Vertical sync pulse for TFT-LCD display
PCS_A[0:2],
PCS_B[0:2]
DSPI
Peripheral chip selects when device is in Master mode; not used in
slave modes.
SCK_A,
SCK_B
DSPI
SPI clock signal—bidirectional
SIN_A,
SIN_B
DSPI
SPI data input signal
SOUT_A,
SOUT_B
DSPI
SPI data output signal
eMIOSA[8:23],
eMIOSB[16:23]
eMIOS
Enhanced Modular Input Output System. 16+8 channel eMIOS for
timed input or output functions.
CANRX_0,
CANRX_1
FlexCAN
Receive (RX) pins for the CAN bus transceiver
CANTX_0, CANTX_1 FlexCAN
Transmit (TX) pins for the CAN bus transceiver
SCL_0,
SCL_1,
SCL_2,
SCL_3
I2C
Bidirectional serial clock compatible with I2C specifications
SDA_0,
SDA_1,
SDA_2,
SDA_3
I2C
Bidirectional serial data compatible with I2C specifications
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