參數(shù)資料
型號： MPC2106SG66
廠商： MOTOROLA INC
元件分類： DRAM
英文描述： 256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
中文描述： 128K X 72 CACHE SRAM MODULE, 9 ns, PDMA182
文件頁數(shù)： 3/20頁
文件大小： 245K
代理商： MPC2106SG66
MPC2105A
MPC2106A
MPC2105B
MPC2106B
3
MOTOROLA FAST SRAM
MPC2106A/B BLOCK DIAGRAM
A13 – A26
A0 – A11
TCLR
TWE
CLK2
MATCH
DIRTYOUT
MATCH
DIRTYQ
VALIDIN
DIRTYIN
TG
TAG: 16K x 12 + V + D
A0 – A13
TAG0 –11
RESET
SW
TW
K
TAH, TAG, TAD
PWRDN
SFUNC, SG
E2
VALIDD
DIRTYD
TG
ALE
ADDR0
ADDR1
PD3
= NC
= NC
= NC
DH24 – DH31 + DP3
CLK1
CLK4
DL16 – DL23 + DP6
CWE7
DL24 – DL31 + DP7
TT1, WTD
VSS
VCC via 100
WTQ
TA, VALIDQ
VCCQ
VDD
NC
A12
VCC
69F618ATQ
G
SE1
ADSC
ADV
CG0
SA
ADS0
CWE0
CLK0
DH0 – DH7 + DP0
CWE1
DH8 – DH15 + DP1
CNTEN0
CWE2
DH16 – DH23 + DP2
CWE3
K
DQB
DQA
SBB
CWE4
SBA
CLK3
DL0 – DL7 + DP4
CWE5
DL8 – DL15 + DP5
CWE6
K
DQB
DQA
SBB
SBA
K
DQB
DQA
SBB
SBA
K
DQB
DQA
SBB
SBA
69F618ATQ
69F618ATQ
69F618ATQ
G
SE1
ADSC
ADV
SA
G
SE1
ADSC
ADV
SA
G
SE1
ADSC
ADV
SA
’244
A13 – A28
BA13 – BA28
PD2
PD1
PD0
J2
J0
J3
J1
69F618ATQ
G
SE2
ADSC
ADV
CG1
SA
ADS1
CNTEN1
K
DQA
DQB
SBA
SBB
K
DQA
DQB
SBA
SBB
K
DQA
DQB
SBA
SBB
K
DQA
DQB
SBA
SBB
69F618ATQ
69F618ATQ
69F618ATQ
G
SE2
ADSC
ADV
SA
G
SE2
ADSC
ADV
SA
G
SE2
ADSC
ADV
SA
A12
BA12
BANK A: SE2 TIED TO.
VDD VIA 100
.
BANK B: SE1 TIED TO. VSS
E1
E2
A12
E1
VSS
Note: BA28 is tied to SA0 on SRAM;
BA27 is tied to SA1 on SRAM;
STANDBY is tied to SE3 on SRAM.
SGW
ADSP
SW
ZZ
SRAM TIE OFF
VDD
VCC
VCC
相關(guān)PDF資料
PDF描述
MPC2105A 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2106CDG66 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2106BSG66 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2107SG15 256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
MPC2105PDG66 256KB/512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
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