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| 型號(hào)： | MM912H634CM1AER2 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 106/349頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 64KS12 LIN2XLS/HS ISENSE |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 應(yīng)用： | 自動(dòng) |
| 核心處理器： | HCS12 |
| 程序存儲(chǔ)器類型： | 閃存（64 kB） |
| 控制器系列： | HCS12 |
| RAM 容量： | 6K x 8 |
| 接口： | LIN |
| 電源電壓： | 5.5 V ~ 27 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP 裸露焊盤（7x7） |
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MM912_634 Advance Information, Rev. 10.0
Freescale Semiconductor
194
Figure 59. Handshake Protocol at the Command Level
Differently from the normal bit transfer (where the host initiates the transmission), the serial interface ACK handshake pulse is
initiated by the target MCU by issuing a negative edge on the BKGD pin. The hardware handshake protocol in Figure 58 specifies
the timing when the BKGD pin is being driven, so the host should follow this timing constraint in order to avoid the risk of an
electrical conflict on the BKGD pin.
NOTE
The only place the BKGD pin can have an electrical conflict is when one side is driving low
and the other side is issuing a speedup pulse (high). Other “highs” are pulled rather than
driven. However, at low rates the time of the speedup pulse can become lengthy and so the
potential conflict time becomes longer as well.
The ACK handshake protocol does not support nested ACK pulses. If a BDM command is not acknowledge by an ACK pulse,
the host needs to abort the pending command first in order to be able to issue a new BDM command. When the CPU enters stop
while the host issues a hardware command (e.g., WRITE_BYTE), the target discards the incoming command due to the stop
being detected. Therefore, the command is not acknowledged by the target, which means that the ACK pulse will not be issued
in this case. After a certain time the host (not aware of stop) should decide to abort any possible pending ACK pulse in order to
be sure a new command can be issued. Therefore, the protocol provides a mechanism in which a command, and its
corresponding ACK, can be aborted.
NOTE
The ACK pulse does not provide a timeout. This means for the GO_UNTIL(182) command
that it can not be distinguished if a stop has been executed (command discarded and ACK
not issued) or if the “UNTIL” condition (BDM active) is just not reached yet. Hence in any
case where the ACK pulse of a command is not issued the possible pending command
should be aborted before issuing a new command. See the handshake abort procedure
5.31.4.8
Hardware Handshake Abort Procedure
The abort procedure is based on the SYNC command. In order to abort a command, which had not issued the corresponding
ACK pulse, the host controller should generate a low pulse in the BKGD pin by driving it low for at least 128 serial clock cycles
and then driving it high for one serial clock cycle, providing a speedup pulse.By detecting this long low pulse in the BKGD pin,
the target executes the SYNC protocol, see Section 5.31.4.9, “SYNC — Request Timed Reference Pulse", and assumes that the
pending command and therefore the related ACK pulse, are being aborted. Therefore, after the SYNC protocol has been
completed the host is free to issue new BDM commands. For BDM firmware READ or WRITE commands it can not be
guaranteed that the pending command is aborted when issuing a SYNC before the corresponding ACK pulse. There is a short
latency time from the time the READ or WRITE access begins until it is finished and the corresponding ACK pulse is issued. The
latency time depends on the firmware READ or WRITE command that is issued and on the selected bus clock rate. When the
SYNC command starts during this latency time the READ or WRITE command will not be aborted, but the corresponding ACK
pulse will be aborted. A pending GO, TRACE1 or GO_UNTIL(182) command can not be aborted. Only the corresponding ACK
pulse can be aborted by the SYNC command.
Although it is not recommended, the host could abort a pending BDM command by issuing a low pulse in the BKGD pin shorter
than 128 serial clock cycles, which will not be interpreted as the SYNC command. The ACK is actually aborted when a negative
edge is perceived by the target in the BKGD pin. The short abort pulse should have at least 4 clock cycles keeping the BKGD
READ_BYTE
BDM Issues the
BKGD Pin
Byte Address
BDM Executes the
READ_BYTE Command
Host
Target
Host
Target
BDM Decodes
the Command
ACK Pulse (out of scale)
Host
Target
(2) Bytes are
Retrieved
New BDM
Command
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM912H634CV1AE | 功能描述:LIN 收發(fā)器 64KS12 LIN2xLS/HS Isense RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| MM912H634CV1AER2 | 功能描述:LIN 收發(fā)器 64KS12 LIN2xLS/HS Isense RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| MM912H634DM1AE | 功能描述:16位微控制器 - MCU 64KS12 LIN2XLS/HS ISENSE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MM912H634DM1AER2 | 功能描述:16位微控制器 - MCU 64KS12 LIN2XLS/HS ISENSE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MM912H634DV1AE | 功能描述:16位微控制器 - MCU 64KS12 LIN2XLS/HS ISENSE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
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