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參數(shù)資料
| 型號： | MDS213CG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 網(wǎng)絡接口 |
| 英文描述： | 12-Port 10/100Mbps + 1Gbps Ethernet Switch |
| 中文描述： | DATACOM, LAN SWITCHING CIRCUIT, PBGA456 |
| 封裝： | 35 X 35 MM, 2.33 MM HEIGHT, MS-034, HSBGA-456 |
| 文件頁數(shù)： | 51/120頁 |
| 文件大小： | 1678K |
| 代理商： | MDS213CG |
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MDS213
Data Sheet
51
Zarlink Semiconductor Inc.
12.3.4 CPU Receiving Multicast frame
The MDS213 is capable of receiving a multicast packet for a combination of local ports, remote ports, and also the
CPU. In this case, the received frame includes multicast destination ports on a remote device, and also the CPU.
The Frame Engine moves the multicast frame to FDB and then form a switch request including the frame header to
Search Engine. Since the frame involves CPU, the Search Engine passes the request to HISC for further process.
HISC informs CPU via a mail, which indicates the handle of FDB. In parallel, the Search Engine sends back a
switch response and ask Frame Engine to forward the frame to destinations ports. Frame Engine will perform the
same multicast forwarding as mentioned above.
CPU read the frame from FDB via MDS213. After read the frame from FDB, CPU will inform HISC to release the
FDB. Finally, HISC passes the release command to Frame Engine to release the FDB accommodated CPU frame.
Note that the Frame Engine won't release FDB until it receives the release signal from HISC and also the counter is
reduced to zero. That means all the ports and CPU have read out the frame.
13.0 Port Mirroring
13.1 Features
The received or transmitted data of any 10/100 port in any MDS213 chip, connected by Port Mirror signal pins,
PM_DO and PM_DI, can be chosen to be mirrored to the "Mirror Port." The mirror port can be the first port in a
MDS213 with RMII or a dedicated mirror port with MII, driven by the pin, PM_DO[0:1]. Once the first RMII port of a
chip is selected to be the mirror port, it cannot be used to serve as a data port. The configuration of port mirroring is
shown in the following diagram, based on the current evaluation board design.
Figure 19 - Configuration of Mirror Port for MDS213
MDS213
Chip 0
PM_DO[1:0]
PM_DENO
MDS213
Chip 1
PM_DO[1:0]
PM_DENO
PM_DI[1:0]
PM_DENI
4 FE
RMII
4 FE
RMII
4 FE
RMII
8 9 10 11
1
GMII
12
4 FE
RMII
4 FE
RMII
4 FE
RMII
1
GMII
25
MII
PHY
Mirror
Port
Port
0 1 2 3
Mirror
4 5 6 7
13 14 15 16 17 18 19 20 21 22 23 24
Mirror
port
port
Port 0 can be RMII mirror port and mirror port 1-11.
Port 13 can be a RMII mirror port and mirror port 0-11, 14-24.
Dedicated MII mirror port can mirror port 0-11, 13-24.
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