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參數(shù)資料
| 型號： | MCM72FB8ML8 |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | 600,000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 256K X 72 CACHE SRAM MODULE, 8 ns, PBGA209 |
| 封裝： | PLASTIC, BGA-209 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 252K |
| 代理商： | MCM72FB8ML8 |
MCM72FB8ML MCM72PB8ML
15
MOTOROLA FAST SRAM
K
ADSP
ADDRESS
ADV
A1
A2
Q(A2)
Q(A1 + 1)
ADSP
(INITIATES
BURST READ)
CLOCK STOP
(CONTINUE
BURST READ)
WAKE UP ADSP
(INITIATES BURST READ)
NOTE: For lowest possible power consumption during stop clock, the addresses should be driven to a low state (VIL).
Best results are obtained if VIL < 0.2 V.
DQx
Q(A1)
MCM72FB8ML FLOW–THROUGH STOP CLOCK WITH READ TIMING
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