參數(shù)資料
型號: MCIMX31VMN5CR2
廠商: Freescale Semiconductor
文件頁數(shù): 7/122頁
文件大?。?/td> 0K
描述: IC MPU MAP I.MX31L 473-MAPBGA
標(biāo)準(zhǔn)包裝: 750
系列: i.MX31
核心處理器: ARM11
芯體尺寸: 32-位
速度: 532MHz
連通性: 1 線,ATA,EBI/EMI,F(xiàn)IR,I²C,MMC/SD,PCMCIA,SIM,SPI,SSI,UART/USART,USB,USB OTG
外圍設(shè)備: DMA,LCD,POR,PWM,WDT
程序存儲器類型: ROMless
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.22 V ~ 3.3 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 473-LFBGA
包裝: 帶卷 (TR)
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
104
Freescale Semiconductor
Electrical Characteristics
4.3.23
USB Electrical Specifications
This section describes the electrical information of the USBOTG port. The OTG port supports both serial
and parallel interfaces.
The high speed (HS) interface is supported via the ULPI (Ultra Low Pin Count Interface). Figure 85
depicts the USB ULPI timing diagram, and Table 64 lists the timing parameters.
Figure 85. USB ULPI Interface Timing Diagram
SS28
(Rx) CK high to FS (bl) high
–10.0
15.0
ns
SS30
(Rx) CK high to FS (bl) low
10.0
ns
SS32
(Rx) CK high to FS (wl) high
–10.0
15.0
ns
SS34
(Rx) CK high to FS (wl) low
10.0
ns
SS35
(Tx/Rx) External FS rise time
6.0
ns
SS36
(Tx/Rx) External FS fall time
6.0
ns
SS40
SRXD setup time before (Rx) CK low
10.0
ns
SS41
SRXD hold time after (Rx) CK low
2.0
ns
Table 64. USB ULPI Interface Timing Specification1
1 Timing parameters are given as viewed by transceiver side.
Parameter
Symbol
Min
Max
Units
Setup time (control in, 8-bit data in)
TSC, TSD
6—
ns
Hold time (control in, 8-bit data in)
THC, THD
0
ns
Output delay (control out, 8-bit data out)
TDC, TDD
—9
ns
Table 63. SSI Receiver with External Clock Timing Parameters (continued)
ID
Parameter
Min
Max
Unit
Clock
Control out (stp)
Data out
Control in (dir, nxt)
Data in
TDD
TDC
TSC
TSD
THD
THC
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX31
Product
Family
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