MCF548x ColdFire Microprocessor, Rev. 4 Freescale S" />
參數(shù)資料
型號： MCF5485CZP200
廠商： Freescale Semiconductor
文件頁數(shù)： 30/34頁
文件大?。?/td> 0K
描述： IC MPU 32BIT COLDF 388-PBGA
標(biāo)準(zhǔn)包裝： 40
系列： MCF548x
核心處理器： Coldfire V4E
芯體尺寸： 32-位
速度： 200MHz
連通性： CAN，EBI/EMI，以太網(wǎng)，I²C，SPI，UART/USART，USB
外圍設(shè)備： DMA，PWM，WDT
輸入/輸出數(shù)： 99
程序存儲器類型： ROMless
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 1.43 V ~ 1.58 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 388-BBGA
包裝： 托盤
DC Electrical Specifications
MCF548x ColdFire Microprocessor, Rev. 4
Freescale Semiconductor
5
2.2
Thermal Resistance
Table 3 lists thermal resistance values.
3
DC Electrical Specifications
Table 4 lists DC electrical operating temperatures. This table is based on an operating voltage of EVDD = 3.3 VDC ± 0.3 VDC
and IVDD of 1.5 ± 0.07 VDC.
Table 3. Thermal Resistance
Characteristic
Symbol
Value
Unit
324 pin TEPBGA — Junction to ambient, natural
convection
Four layer board (2s2p)
θ
JMA
20–221,2
1
θ
JA and Ψjt parameters are simulated in accordance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
θ
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction
temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the device
junction temperature specification can be verified by physical measurement in the customer’s system using the
Ψ
jt
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
2 Per JEDEC JESD51-6 with the board horizontal.
°C/W
388 pin TEPBGA — Junction to ambient, natural
convection
Four layer board (2s2p)
θ
JMA
191,2
°C/W
Junction to ambient (@200 ft/min)
Four layer board (2s2p)
θ
JMA
161,2
°C/W
Junction to board
—
θ
JB
113
3 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is
measured on the top surface of the board near the package.
°C/W
Junction to case
—
θ
JC
74
4 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
°C/W
Junction to top of package
Natural convection
Ψ
jt
5 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is
written as Psi-JT.
°C/W
Table 4. DC Electrical Specifications
Characteristic
Symbol
Min
Max
Units
External (I/O pads) operation voltage range
EVDD
3.0
3.6
V
Memory (I/O pads) operation voltage range (DDR Memory)
SD VDD
2.30
2.70
V
Internal logic operation voltage range1
IVDD
1.43
1.58
V
PLL Analog operation voltage range1
PLL VDD
1.43
1.58
V
USB oscillator operation voltage range
USB_OSVDD
3.0
3.6
V
USB digital logic operation voltage range
USBVDD
3.0
3.6
V
USB PHY operation voltage range
USB_PHYVDD
3.0
3.6
V
USB oscillator analog operation voltage range
USB_OSCAVDD
1.43
1.58
V
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