參數(shù)資料
型號： MCBOE32GQAPQ-MWA
元件分類： 存儲控制器/管理單元
英文描述： FLASH MEMORY DRIVE CONTROLLER, PBGA
封裝： FBGA
文件頁數(shù)： 23/65頁
文件大?。?/td> 799K
代理商： MCBOE32GQAPQ-MWA
NAND Flash-based Solid State Disk
3
Sep. 27. 2006
TABLE OF CONTENTS
1. General Description
2. Physical Specifications
2.1 Small Type Physical Dimensions(16GB)
2.2 Slim Type Physical Dimensions(4/8/16GB)
2.3 Slim Type Physical Dimensions(32GB)
3. Product Specifications
3.1 System Interface and Configuration
3.2 System Performance
3.3 System Power Consumption
3.4 System Reliability
3.5 Environmental Specifications
4. Electrical Specifications
4.1 ZIF Connector Dimensions
4.2 Pin Assignment
4.3 Signal Descriptions
4.4 DC Characteristics
4.4.1 Absolute Maximum Ratings
4.4.2 Recommended Operating Conditions
4.4.3 Electrical Characteristics
4.5 AC Characteristics
4.5.1 Register Transfers
4.5.2 PIO Data Transfers
4.5.3 Multiword DMA Data Transfer
4.5.3.1 Initiating a Multiword DMA data burst
4.5.3.2 Sustaining a Multiword DMA data burst
4.5.3.3 Device terminating a Multiword DMA data burst
4.5.3.4 Host terminating a Multiword DMA data burst
4.5.4 Ultra DMA Data Transfer
4.5.4.1 Initiating an Ultra DMA data-in burst
4.5.4.2 Sustained Ultra DMA data-in burst
4.5.4.3 Host pausing an Ultra DMA data-in burst
4.5.4.4 Device terminating an Ultra DMA data-in burst
4.5.4.5 Host terminating an Ultra DMA data-in burst
4.5.4.6 Initiating an Ultra DMA data-out burst
4.5.4.7 Sustained Ultra DMA data-out burst
4.5.4.8 Device pausing an Ultra DMA data-out burst
4.5.4.9 Host terminating an Ultra DMA data-out burst
4.5.4.10 Device terminating an Ultra DMA data-out burst
5. ATA Registers
5.1 I/O Register Descriptions
5.2 Alternate Status Register
5.2.1 Address
5.2.2 Direction
5.2.3 Access Restrictions
5.2.4. Effect
5.2.5 Functional Description
5.3 Command Register
5.3.1 Address
5.3.2 Direction
5.3.3 Access Restrictions
5.3.4 Effect
5.3.5 Functional description
5.3.6 Field/bit description
5.4 Cylinder High Register
5.4.1 Address
5.4.2 Direction
5.4.3 Access Restrictions
5.4.4 Effect
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